Power ISA

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Power ISA is the specification for how Power architecture processors are to behave. It dictates the machine instructions available, and exactly how they are to process given data.

There are two primary versions of the Power ISA that are of interest to PowerNV platforms:


The Power ISA evolved from the PowerPC ISA which in turn was an evolution of the POWER ISA used by POWER1 and POWER2 chips.


When the Power ISA 3.0B specification lists all available instructions, it specifically mentions what version of which architecture introduced the instruction; this gives a fairly quick history of the ISA itself:

Key to Version column in Power ISA 3.0B instruction list
Code Released Specification Compliant cores
P1 POWER Architecture
P2 POWER2 Architecture
PPC PowerPC Architecture prior to v2.00
v2.00 PowerPC Architecture v2.00 POWER4
v2.01 December 2003 PowerPC Architecture v2.01 POWER4+, PPC970
v2.02 February 2005 PowerPC Architecture v2.02 POWER5, Cell PPE
v2.03 September 2006 Power ISA v2.03 PPC405, PPC440, PPC460, e200, e500, POWER5+
v2.04 April 2007 Power ISA v2.04 POWER5++, PA6T
v2.05 October 2007 Power ISA v2.05 POWER6
v2.06 January 2009 Power ISA v2.06 e500mc, e5500, e6500, POWER7, A2, A2I
v2.06B July 2010 Power ISA v2.06B
v2.07 May 2013 Power ISA v2.07 POWER8, A2O
v2.07B April 2015 Power ISA v2.07B
v3.0 November 2015 Power ISA v3.0 Microwatt, Chiselwatt, Libre-SOC
v3.0B March 2017 Power ISA v3.0B POWER9
v3.0C May 2020 Power ISA v3.0C
v3.1 May 2020 Power ISA v3.1 POWER10, S1
v3.1B September 2021 Power ISA v3.1B


See also

External Links