Power ISA/Vector Operations

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The Power Architecture ISA includes a specification of vector or SIMD operations. Prior to the Power ISA, i.e. PowerPC, some of these operations were available, but defined in an external standard, called Altivec by Freescale (Motorola spin-off), Vector Multimedia Extension (VMX) by IBM, and Velocity Engine by Apple.

The Vector operations are classified as Vector Facility and Vector Scalar Extension (VSX) in current versions of the Power ISA.

Power ISA v2.07 still refers to some instructions as VMX in its summary of changes since the previous version, but the rest of the document avoids mentioning VMX completely.

Power ISA v3.0 no longer mentions VMX at all.

According to File:POWER9-Features-and-Specifications.pdf page 7, the Vector Scalar Unit (VSU)'s 128-bit hardware is dedicated per super-slice (2 threads). This may indicate that trying to aggressively use 128-bit VSX instructions in two threads that use the same super-slice will be inefficient. It is possible that clever usage of taskset may improve this situation.

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