Difference between revisions of "Power ISA"
Jump to navigation
Jump to search
(→History: added Chiselwatt, Libre-SOC) |
|||
| (5 intermediate revisions by 2 users not shown) | |||
| Line 68: | Line 68: | ||
|January 2009 | |January 2009 | ||
|[[:File:PowerISA_V2.06_PUBLIC.pdf| Power ISA v2.06]] | |[[:File:PowerISA_V2.06_PUBLIC.pdf| Power ISA v2.06]] | ||
| − | |e5500, POWER7, A2, A2I | + | |e500mc, e5500, e6500, POWER7, A2, A2I |
|- | |- | ||
|v2.06B | |v2.06B | ||
| Line 78: | Line 78: | ||
|May 2013 | |May 2013 | ||
|[[:File:PowerISA_V2.07_PUBLIC.pdf| Power ISA v2.07]] | |[[:File:PowerISA_V2.07_PUBLIC.pdf| Power ISA v2.07]] | ||
| − | | | + | |[[POWER8]], A2O |
|- | |- | ||
|v2.07B | |v2.07B | ||
| Line 103: | Line 103: | ||
|May 2020 | |May 2020 | ||
|[[:File:PowerISA_public.v3.1.pdf| Power ISA v3.1]] | |[[:File:PowerISA_public.v3.1.pdf| Power ISA v3.1]] | ||
| − | |[[POWER10]] | + | |[[POWER10]], [[S1]] |
| + | |- | ||
| + | |v3.1B | ||
| + | |September 2021 | ||
| + | |[[:File:OPF_PowerISA_v3.1B.pdf| Power ISA v3.1B]] | ||
| + | | | ||
|} | |} | ||
| Line 109: | Line 114: | ||
* [[:File:POWER9 Processor Programming Model Bulletin 090919.pdf|Ultravisor ISA Extensions for POWER9]] | * [[:File:POWER9 Processor Programming Model Bulletin 090919.pdf|Ultravisor ISA Extensions for POWER9]] | ||
| + | * [[PowerPC AS]] | ||
== See also == | == See also == | ||
Latest revision as of 08:50, 23 January 2024
Power ISA is the specification for how Power architecture processors are to behave. It dictates the machine instructions available, and exactly how they are to process given data.
There are two primary versions of the Power ISA that are of interest to PowerNV platforms:
Contents
History
The Power ISA evolved from the PowerPC ISA which in turn was an evolution of the POWER ISA used by POWER1 and POWER2 chips.
POWER ISA → PowerPC ISA → Power ISA
When the Power ISA 3.0B specification lists all available instructions, it specifically mentions what version of which architecture introduced the instruction; this gives a fairly quick history of the ISA itself:
| Code | Released | Specification | Compliant cores |
|---|---|---|---|
| P1 | POWER Architecture | ||
| P2 | POWER2 Architecture | ||
| PPC | PowerPC Architecture prior to v2.00 | ||
| v2.00 | PowerPC Architecture v2.00 | POWER4 | |
| v2.01 | December 2003 | PowerPC Architecture v2.01 | POWER4+, PPC970 |
| v2.02 | February 2005 | PowerPC Architecture v2.02 | POWER5, Cell PPE |
| v2.03 | September 2006 | Power ISA v2.03 | PPC405, PPC440, PPC460, e200, e500, POWER5+ |
| v2.04 | April 2007 | Power ISA v2.04 | POWER5++, PA6T |
| v2.05 | October 2007 | Power ISA v2.05 | POWER6 |
| v2.06 | January 2009 | Power ISA v2.06 | e500mc, e5500, e6500, POWER7, A2, A2I |
| v2.06B | July 2010 | Power ISA v2.06B | |
| v2.07 | May 2013 | Power ISA v2.07 | POWER8, A2O |
| v2.07B | April 2015 | Power ISA v2.07B | |
| v3.0 | November 2015 | Power ISA v3.0 | Microwatt, Chiselwatt, Libre-SOC |
| v3.0B | March 2017 | Power ISA v3.0B | POWER9 |
| v3.0C | May 2020 | Power ISA v3.0C | |
| v3.1 | May 2020 | Power ISA v3.1 | POWER10, S1 |
| v3.1B | September 2021 | Power ISA v3.1B |
