Difference between revisions of "Power ISA/Vector Operations"
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* Sridhar Venkat. [https://community.ibm.com/community/user/powerdeveloper/blogs/sridhar-venkat1/2022/08/29/power10-mma MMA in IBM Power10 processor]. Published August 29, 2022 | * Sridhar Venkat. [https://community.ibm.com/community/user/powerdeveloper/blogs/sridhar-venkat1/2022/08/29/power10-mma MMA in IBM Power10 processor]. Published August 29, 2022 | ||
* VectorCamp. [https://simd.info/ SIMD.info], an online searchable reference tool for C intrinsics of all major SIMD engines (including VSX). | * VectorCamp. [https://simd.info/ SIMD.info], an online searchable reference tool for C intrinsics of all major SIMD engines (including VSX). | ||
| + | * VectorCamp. [https://simd.ai/ Advanced SIMD Porting Intelligence]. LLM that helps optimize and port code to SIMD architectures in seconds. | ||
| − | == | + | == GitHub / GitLab pages == |
=== Translation from other architectures === | === Translation from other architectures === | ||
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* [https://github.com/llvm/llvm-project/tree/main/clang/lib/Headers/ppc_wrappers Clang]. x86 to VSX. | * [https://github.com/llvm/llvm-project/tree/main/clang/lib/Headers/ppc_wrappers Clang]. x86 to VSX. | ||
* [https://github.com/simd-everywhere/simde SIMD Everywhere]. x86/ARM/WASM to VSX (and other arches). | * [https://github.com/simd-everywhere/simde SIMD Everywhere]. x86/ARM/WASM to VSX (and other arches). | ||
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=== SIMD libraries and frameworks === | === SIMD libraries and frameworks === | ||
Latest revision as of 15:12, 1 July 2025
The Power ISA includes a specification of vector or SIMD operations. Prior to the Power ISA, i.e. PowerPC, some of these operations were available, but defined in an external standard, called Altivec by Freescale (Motorola spin-off), Vector Multimedia Extension (VMX) by IBM, and Velocity Engine by Apple.
The Vector operations are classified as Vector Facility and Vector Scalar Extension (VSX) in current versions of the Power ISA.
Power ISA v2.07 still refers to some instructions as VMX in its summary of changes since the previous version, but the rest of the document avoids mentioning VMX completely.
Power ISA v3.0 no longer mentions VMX at all.
According to File:POWER9-Features-and-Specifications.pdf page 7, the Vector Scalar Unit (VSU)'s 128-bit hardware is dedicated per super-slice (2 threads). This may indicate that trying to aggressively use 128-bit VSX instructions in two threads that use the same super-slice will be inefficient. It is possible that clever usage of taskset may improve this situation.
Power ISA v3.1 adds an optional VSX extension, MMA (Matrix-Multiply Assist), targeted at matrix math applications.
Contents
External Links
- Seebach, Peter. Unrolling AltiVec, Part 1, Introducing the PowerPC SIMD unit. Published March 01, 2005
- Seebach, Peter. Unrolling AltiVec, Part 2, Optimize code for SIMD processing. Published March 16, 2005
- Gschwind, Michael. Workload acceleration with the IBM POWER vector-scalar architecture. Published March, 2016
- Clarke, Paul. Vectorizing for fun and performance. Published January 24, 2018
- OpenPOWER. Vector Intrinsics Porting Guide. Published March 13, 2018
- Talospace. Easier Power ISA vectorizing for fun and profit with GCC x86 intrinsics. Published July 26, 2019
- OpenPOWER. Vector Intrinsics Programming Reference Specification. Published August 11, 2020
- Ruzhu Chen. Linux on IBM Power Systems application porting and tuning guide. Published September 27, 2020
- OpenPOWER. Vector Intrinsic Programming Reference Compliance Specification. Published March 28, 2021
- José E. Moreira. A matrix math facility for Power ISA(TM) processors. Published April 7, 2021
- José E. Moreira. Matrix-Multiply Assist Best Practices Guide. Published April 15, 2021
- Sridhar Venkat. MMA in IBM Power10 processor. Published August 29, 2022
- VectorCamp. SIMD.info, an online searchable reference tool for C intrinsics of all major SIMD engines (including VSX).
- VectorCamp. Advanced SIMD Porting Intelligence. LLM that helps optimize and port code to SIMD architectures in seconds.
GitHub / GitLab pages
Translation from other architectures
Implementations of non-POWER instruction sets for POWER.
- GCC. x86 to VSX.
- Clang. x86 to VSX.
- SIMD Everywhere. x86/ARM/WASM to VSX (and other arches).
SIMD libraries and frameworks
- Eigen. A C++ template library for linear algebra: matrices, vectors, numerical solvers and related algorithms
- EVE - the Expressive Vector Engine. SIMD in C++
- Highway. C++ library that provides portable SIMD/vector intrinsics
- Simd Library. C++ image processing and machine learning library with using of SIMD
- pveclib. Power Vector Library
- UniSIMD Assembler. SIMD macro assembler unified for ARM, MIPS, PPC and x86
- libsimdpp. Portable header-only C++ low level SIMD library
- inastemp. Intrinsics as template - is a basic library to use vectorization easily in C++
Specialized implementations
- simdutf. C++ library for fast Unicode transcoding using SIMD
- libjpeg-turbo. A JPEG image codec that uses SIMD instructions to accelerate baseline JPEG compression and decompression
- Vectorscan. A portable fork of the high-performance regular expression matching library
- SLEEF. SIMD Library for Evaluating Elementary Functions, vectorized libm and DFT
- Turbo Base64. Fastest Base64 SIMD:SSE/AVX2/AVX512/Neon/Altivec
- Camellia cipher. SIMD vector implementations ... for POWER (with VMX+VSX+crypto instructions)
- libvpx. Video codec library with specific optimizations for ppc64le
- lamevmx. Altivec optimized MP3 encoder
- libfreevec. SIMD optimized GNU C library
