Murano

From RCS Wiki
Jump to navigation Jump to search
Package Information
Murano
Processor POWER8
Structure DCM
Maximum base clock -
Maximum turbo clock -
Maximum TDP -
PCIe controllers (PEC) -
PCIe generation 3
Maximum PCIe lanes -
Maximum PCIe endpoints -
CAPI interfaces -
Retrieved from "https://wiki.raptorcs.com/w/index.php?title=Murano&oldid=2052"