Power ISA/Vector Operations
Revision as of 19:13, 14 December 2020 by MPC7500 (talk | contribs) (→External Links: changed last URL from draft to final)
The Power Architecture ISA includes a specification of vector or SIMD operations. Prior to the Power ISA, i.e. PowerPC, some of these operations were available, but defined in an external standard, called Altivec by Freescale (Motorola spin-off), Vector Multimedia Extension (VMX) by IBM, and Velocity Engine by Apple.
The Vector operations are classified as Vector Facility and Vector Scalar Extension (VSX) in current versions of the Power ISA.
Power ISA v2.07 still refers to some instructions as VMX in its summary of changes since the previous version, but the rest of the document avoids mentioning VMX completely.
Power ISA v3.0 no longer mentions VMX at all.
External Links
- Seebach, Peter. Unrolling AltiVec, Part 1, Introducing the PowerPC SIMD unit. Published March 01, 2005
- Seebach, Peter. Unrolling AltiVec, Part 2, Optimize code for SIMD processing. Published March 16, 2005
- Gschwind, Michael. Workload acceleration with the IBM POWER vector-scalar architecture. IBM Journal of Research and Development. Published March, 2016
- Clarke, Paul. Porting x86 vector intrinsics code to Linux on Power in a hurry. Published January 24, 2018
- OpenPOWER. Linux on Power Porting Guide: Vector Intrinsics. Published March 13, 2018
- OpenPOWER. Power Vector Intrinsic Programming Reference. Published October 12, 2020
