Power ISA
Power ISA is the specification for how Power architecture processors are to behave. It dictates the machine instructions available, and exactly how they are to process given data.
There are two primary versions of the Power ISA that are of interest to PowerNV platforms:
History
The Power ISA evolved from the PowerPC ISA which in turn was an evolution of the POWER ISA used by POWER1 and POWER2 chips.
POWER ISA → PowerPC ISA → Power ISA
When the Power ISA 3.0B specification lists all available instructions, it specifically mentions what version of which architecture introduced the instruction; this gives a fairly quick history of the ISA itself:
| Code | Explanation |
|---|---|
| P1 | Instruction introduced in the POWER Architecture. |
| P2 | Instruction introduced in the POWER2 Architecture. |
| PPC | Instruction introduced in the PowerPC Architecture prior to v2.00. |
| v2.00 | Instruction introduced in the PowerPC Architecture Version 2.00. |
| v2.01 | Instruction introduced in the PowerPC Architecture Version 2.01. |
| v2.02 | Instruction introduced in the PowerPC Architecture Version 2.02. |
| v2.03 | Instruction introduced in the Power ISA Architecture Version 2.03. |
| v2.04 | Instruction introduced in the Power ISA Architecture Version 2.04. |
| v2.05 | Instruction introduced in the Power ISA Architecture Version 2.05. |
| v2.06 | Instruction introduced in the Power ISA Architecture Version 2.06. |
| v2.07 | Instruction introduced in the Power ISA Architecture Version 2.07. |
| v3.0 | Instruction introduced in the Power ISA Architecture Version 3.0. |
| v3.0B | Instruction introduced in the Power ISA Architecture Version 3.0B. |
