Power ISA

Power ISA is the specification for how Power architecture processors are to behave. It dictates the machine instructions available, and exactly how they are to process given data.

There are two primary versions of the Power ISA that are of interest to PowerNV platforms:

• Version 2.07 (POWER8 / POWER8E)
• Version 3.0B (POWER9)

History

The Power ISA evolved from the PowerPC ISA which in turn was an evolution of the POWER ISA used by POWER1 and POWER2 chips.

POWER ISA → PowerPC ISA → Power ISA

When the Power ISA 3.0B specification lists all available instructions, it specifically mentions what version of which architecture introduced the instruction; this gives a fairly quick history of the ISA itself:

Key to Version column in Power ISA 3.0B instruction list

Code	Released	Specification	Compliant cores
P1		POWER Architecture
P2		POWER2 Architecture
PPC		PowerPC Architecture prior to v2.00
v2.00		PowerPC Architecture v2.00
v2.01	December 2003	PowerPC Architecture v2.01	PPC970
v2.02	February 2005	PowerPC Architecture v2.02	POWER5, Cell PPE
v2.03	September 2006	Power ISA v2.03	PPC405, PPC440, PPC460, e200, e500, POWER5+
v2.04	April 2007	Power ISA v2.04	POWER5++
v2.05	October 2007	Power ISA v2.05	POWER6
v2.06	January 2009	Power ISA v2.06	e5500, POWER7
v2.06B	July 2010	Power ISA v2.06B
v2.07	May 2013	Power ISA v2.07	e6500, POWER8
v2.07B	April 2015	Power ISA v2.07B
v3.0	November 2015	Power ISA v3.0
v3.0B	March 2017	Power ISA v3.0B	POWER9

See also

• Power ISA/Privilege States
• Power ISA/Machine State Register
• Power ISA/Vector Operations

External Links

• Power ISA at IBM OpenPOWER portal

• Power ISA English Wikipedia page