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- 14:33, 19 December 2017 diff hist +163 OCC
- 14:32, 19 December 2017 diff hist +356 N OCC Created page with "{{Glossary |name=On-Chip Controller |abbr=OCC |desc=Auxillary Power ISA microprocessor on OpenPOWER CPUs. Periodically monitors chip workload, power consumption and..."
- 14:29, 19 December 2017 diff hist +17 N Flexible Service Interface Redirected page to FSI current
- 14:29, 19 December 2017 diff hist +362 N FSI Created page with "{{Glossary |name=Flexible Service Interface |abbr=FSI |desc=Custom serial interface present on OpenPOWER CPUs. Functions as a master control interface for the CPU, u..."
- 14:26, 19 December 2017 diff hist +19 N Extended SCOM Redirected page to XSCOM current
- 14:26, 19 December 2017 diff hist +144 N XSCOM Created page with "{{Glossary |name=Extended SCOM |abbr=XSCOM |desc=Special, fast SCOM that allows processor cores to directly SCOM the PIB. }}" current
- 14:24, 19 December 2017 diff hist +13 Self-Boot Engine
- 14:24, 19 December 2017 diff hist +133 N PIBMEM Created page with "{{Glossary |name=PIBMEM |abbr=PIBMEM |desc=A small SRAM attached to the PIB bus and used by the SBE as its memory. }}"
- 14:23, 19 December 2017 diff hist +17 N Pervasive Interconnect Bus Redirected page to PIB current
- 14:23, 19 December 2017 diff hist +199 N PIB Created page with "{{Glossary |name=Pervasive Interconnect Bus |abbr=PIB |desc=Internal bus on POWER9 CPUs that provides read and write access to various internal chip functions attach..." current
- 14:21, 19 December 2017 diff hist +18 N Serial Communications Redirected page to SCOM current
- 14:21, 19 December 2017 diff hist +225 N SCOM Created page with "{{Glossary |name=Serial Communications |abbr=SCOM |desc=SCOM accesses provide a way to manipulate CPU chip internal state via the PIB on POWER9 CPUs. They are us..."
- 14:14, 19 December 2017 diff hist +21 N Serial EEPROM Redirected page to SEEPROM current
- 14:14, 19 December 2017 diff hist +242 N SEEPROM Created page with "{{Glossary |name=Serial EEPROM |abbr=SEEPROM |desc=Small nonvolatile EEPROM located on a POWER9 CPU module. Used to store two redundant copies o..."
- 14:10, 19 December 2017 diff hist +17 N Workload-Optimized Frequency Redirected page to WOF current
- 14:10, 19 December 2017 diff hist +170 N WOF Created page with "{{Glossary |name=Workload-Optimized Frequency |abbr=WOF |desc=The frequency at which a POWER9 core runs, selected automatically according to current workload.}}"
- 14:05, 19 December 2017 diff hist +17 N PCI Express Host Bridge Redirected page to PHB current
- 14:05, 19 December 2017 diff hist +213 N PHB Created page with "{{Glossary |name=PCI Express Host Bridge |abbr=PHB |desc=PCIe controller integrated into the CPU and which connects the CPU with a number of PCIe lanes. Initialized auto..." current
- 14:01, 19 December 2017 diff hist +18 N OpenPOWER Abstraction Layer Redirected page to OPAL current
- 14:01, 19 December 2017 diff hist +311 N OPAL Created page with "{{Glossary |name=OpenPOWER Abstraction Layer |abbr=OPAL |desc=Runtime API implemented by firmware called into by the host operating system to invoke platform-specific fu..." current