Monza

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Package Information
Monza
Processor	POWER9
Chip	Nimbus
Maximum base clock	-
Maximum WOF clock	-
Maximum TDP	-
PCIe controllers (PEC)	-
PCIe generation	4
Maximum PCIe lanes	34
Maximum PCIe endpoints	-
CAPI 2.0 interfaces	-
OpenCAPI/NVLink lanes	48
OpenCAPI interfaces	6
NVLink interfaces	3

External Links

Monza Module at IBM OpenPOWER portal

Retrieved from "https://wiki.raptorcs.com/w/index.php?title=Monza&oldid=640"

Modules