Difference between revisions of "Power ISA/Privilege States"
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At the moment very little information exists about the Ultravisor State. It is not mentioned in Power ISA version 2.07 documents at all, and version 3.0B only mentions it as a possible privilege of instructions. There is no official documentation of a ''UV'' - ''Ultravisor State'' [[Machine State Register]] bit, although some source code does reference its existence.<ref>https://patchwork.ozlabs.org/patch/719952/</ref><ref>[https://www.ibm.com/developerworks/community/forums/atom/download/skiboot.pdf?nodeId=7d69546b-3d92-4320-8ed2-0ea61ab69d66 skiboot Documentation] Release v5.9</ref><ref>[https://www.ibm.com/developerworks/community/forums/atom/download/skiboot.pdf?nodeId=7d69546b-3d92-4320-8ed2-0ea61ab69d66 skiboot Documentation] Release v5.9</ref> | At the moment very little information exists about the Ultravisor State. It is not mentioned in Power ISA version 2.07 documents at all, and version 3.0B only mentions it as a possible privilege of instructions. There is no official documentation of a ''UV'' - ''Ultravisor State'' [[Machine State Register]] bit, although some source code does reference its existence.<ref>https://patchwork.ozlabs.org/patch/719952/</ref><ref>[https://www.ibm.com/developerworks/community/forums/atom/download/skiboot.pdf?nodeId=7d69546b-3d92-4320-8ed2-0ea61ab69d66 skiboot Documentation] Release v5.9</ref><ref>[https://www.ibm.com/developerworks/community/forums/atom/download/skiboot.pdf?nodeId=7d69546b-3d92-4320-8ed2-0ea61ab69d66 skiboot Documentation] Release v5.9</ref> | ||
| − | A report from IBM for the Air Force Research Laboratory indicates than Ultravisor State was tested in a modified [[POWER8|POWER8]] processor simulation. | + | A report from IBM for the Air Force Research Laboratory indicates than Ultravisor State was tested in a modified [[POWER8|POWER8]] processor simulation.<ref>[[File:AFRL-RI-RS-TR-2017-021.pdf|HARDWARE SUPPORT FOR MALWARE DEFENSE AND END-TO-END TRUST]]. IBM. 2017-02</ref> It is currently unknown if which, if any, [[POWER9|POWER9]] processors are capable of Ultravisor State. |
=== Hypervisor State === | === Hypervisor State === | ||
| − | Hypervisor State was introduced in POWER4, although for some time it was not included in documentation, appearing only as a ''reserved'' bit in the Machine State Register.<ref>Kerr, Jeremy. [https://www.youtube.com/watch?v=DigNr08GVss OpenPOWER: building an open-source software stack from bare metal] (video). Linux.conf.au 2015</ref> | + | Hypervisor State is indicated by the [[Machine State Register#Bit_3_-_Hypervisor_State_.28HV.29|HV (bit 3)]] of the Machine State Register, and is normally used by a hypervisor. An operating system running without a hypervisor can run in Hypervisor State, with its userland in Problem State and avoid using Privileged State altogether. |
| + | |||
| + | Hypervisor State was introduced in POWER4, although for some time it was not included in documentation, appearing only as a ''reserved'' bit in the Machine State Register.<ref>Kerr, Jeremy. [https://www.youtube.com/watch?v=DigNr08GVss OpenPOWER: building an open-source software stack from bare metal] (video). Linux.conf.au 2015</ref> | ||
=== Privileged State === | === Privileged State === | ||
| − | + | Privileged State, also called Supervisor Mode, is normally used by an operating system running on top of a hypervisor. | |
=== Problem State === | === Problem State === | ||
| − | + | Problem State, also called User Mode, is indicated by the [[Machine State Register#Bit_49_-_Problem_State_.28PR.29|PR (bit 49)]] of the Machine State Register. | |
== Instruction Classification == | == Instruction Classification == | ||
Revision as of 02:45, 21 January 2018
Contents
States
Ultravisor State
At the moment very little information exists about the Ultravisor State. It is not mentioned in Power ISA version 2.07 documents at all, and version 3.0B only mentions it as a possible privilege of instructions. There is no official documentation of a UV - Ultravisor State Machine State Register bit, although some source code does reference its existence.[1][2][3]
A report from IBM for the Air Force Research Laboratory indicates than Ultravisor State was tested in a modified POWER8 processor simulation.[4] It is currently unknown if which, if any, POWER9 processors are capable of Ultravisor State.
Hypervisor State
Hypervisor State is indicated by the HV (bit 3) of the Machine State Register, and is normally used by a hypervisor. An operating system running without a hypervisor can run in Hypervisor State, with its userland in Problem State and avoid using Privileged State altogether.
Hypervisor State was introduced in POWER4, although for some time it was not included in documentation, appearing only as a reserved bit in the Machine State Register.[5]
Privileged State
Privileged State, also called Supervisor Mode, is normally used by an operating system running on top of a hypervisor.
Problem State
Problem State, also called User Mode, is indicated by the PR (bit 49) of the Machine State Register.
Instruction Classification
| Code | 2.07 | 3.0B | Description |
|---|---|---|---|
| P | Yes | Yes | a privileged instruction. |
| O | Yes | Yes | an instruction that is treated as privileged or nonprivileged (or hypervisor, for mtspr), depend-
ing on the SPR or PMR number. |
| PI | No | Yes | an instruction that is illegal in privileged state. |
| H | Yes | Yes | an instruction that can be executed only in hypervisor state |
| PH | Yes | No | a hypervisor privileged instruction if Category Embedded.Hypervisor is implemented; otherwise
denotes a privileged instruction. |
| M | Yes | No | an instruction that is treated as privileged or nonprivileged, depending on the value of the UCLE
bit in the MSR |
| U | No | Yes | an instruction that can be executed only in ultravisor state |
References
- ↑ https://patchwork.ozlabs.org/patch/719952/
- ↑ skiboot Documentation Release v5.9
- ↑ skiboot Documentation Release v5.9
- ↑ File:AFRL-RI-RS-TR-2017-021.pdf. IBM. 2017-02
- ↑ Kerr, Jeremy. OpenPOWER: building an open-source software stack from bare metal (video). Linux.conf.au 2015
