Difference between revisions of "OpenPOWER Firmware"
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== Process == | == Process == | ||
| + | # [[OpenBMC|OpenBMC]] uses [[FSI|FSI]] interface to start SBE | ||
# SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM | # SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM | ||
# SBE executes SEEPROM firmware | # SBE executes SEEPROM firmware | ||
| − | |||
# [[Self-Boot Engine|SBE]] loads Hostboot | # [[Self-Boot Engine|SBE]] loads Hostboot | ||
# [[Hostboot|Hostboot]] loads Skiboot | # [[Hostboot|Hostboot]] loads Skiboot | ||
Revision as of 03:45, 7 November 2022
OpenPOWER Firmware is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.[1] It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.[2]
OpenBMC is a separate project that creates firmware for the Baseboard Management Controller.
Components
| Firmware | Executed on | Loaded from | Function |
|---|---|---|---|
| SBE - OTPROM | SBE core (on CPU) | OTPROM (on CPU die) | The portion of Self-Boot Engine (SBE) firmware permanently written via eFuses into the POWER9 silicon's OTPROM
|
| SBE - SEEPROM | SBE core (on CPU) | SBE SEEPROM (on CPU) | The portion of Self-Boot Engine (SBE) firmware run from rewritable SEEPROM
|
| Hostboot Bootloader (HBBL) | CPU core | SBE SEEPROM (on CPU) |
|
| Hostboot | CPU core | PNOR (SPI Flash) |
|
| Skiboot | CPU core | PNOR (SPI Flash) |
|
| Skiroot/Petitboot | CPU core | PNOR (SPI Flash) | |
| OCC firmware | OCC core (on CPU) | PNOR (SPI Flash) | The On-Chip Controller (OCC) manages:
|
| CME HCODE | CME cores (on CPU) | PNOR (SPI Flash) | The Core Management Engines (CME) are auxillary cores used for power management purposes. They are ultimately responsible to the OCC.
|
| SGPE and PGPE HCODE | SGPE and PGPE cores (on CPU) | PNOR (SPI Flash) | General Purpose Engine (GPE) cores which assist, and are managed by, the OCC.
|
| IOPPE HCODE | IOPPE cores (on CPU) | PNOR (SPI Flash) |
|
| OpenBMC | BMC chip | BMC SPI Flash |
(This is not part of OpenPOWER firmware, but is mentioned to give a picture of the division of responsibilities. Not all POWER9 systems use a BMC; IBM systems use a FSP.)
|
Diagram of main and auxillary cores on POWER9
Process
- OpenBMC uses FSI interface to start SBE
- SBE executes OTPROM, which loads SEEPROM firmware into SBE PIBMEM
- SBE executes SEEPROM firmware
- SBE loads Hostboot
- Hostboot loads Skiboot
- Skiboot loads OCC, Skiroot
- Petitboot application within Skiroot loads the operating system
- OS talks to firmware through OPAL
References
- ↑ Kerr, Jeremy. OpenPOWER: building an open-source software stack from bare metal. LCA 2015 - video on YouTube
- ↑ Smith, Stewart. Adventures in OpenPOWER Firmware. LCA 2016 - video on YouTube
See also
External Links
- OpenPOWER firmware source code on GitHub
- For a better understanding of OpenPOWER firmware and boot processes, see:
- Bug tracker for firmware issues specific to Raptor CS products: https://bugs.raptorengineering.com/