Difference between revisions of "Sforza"
(→Configurations: re-adding table entry from twitter - details in comment) |
(→Configurations: adding entries from WikiChip) |
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| Line 96: | Line 96: | ||
! Cores | ! Cores | ||
! Stepping | ! Stepping | ||
| + | ! GHz | ||
! TDP | ! TDP | ||
|- <!-- https://twitter.com/SamatJain/status/1246199602144927744 --> | |- <!-- https://twitter.com/SamatJain/status/1246199602144927744 --> | ||
| 02CY771 | | 02CY771 | ||
| 12 | | 12 | ||
| − | | | + | | |
| + | | | ||
| + | | 105 W | ||
| + | |- | ||
| + | | 02AA986 | ||
| + | | 16 | ||
| + | | | ||
| + | | 2.9/3.8 | ||
| + | | 190 W | ||
| + | |- | ||
| + | | 02CY227 | ||
| + | | 22 | ||
| + | | | ||
| + | | 2.6/3.8 | ||
| + | | 190 W | ||
| + | |- | ||
| + | | 02CY228 | ||
| + | | 20 | ||
| + | | | ||
| + | | 2.7/3.8 | ||
| + | | 190 W | ||
| + | |- | ||
| + | | 02CY230 | ||
| + | | 16 | ||
| + | | | ||
| + | | 2.9/3.8 | ||
| + | | 190 W | ||
| + | |- | ||
| + | | 02CY414 | ||
| + | | 22 | ||
| + | | | ||
| + | | 2.25/3.8 | ||
| + | | 160 W | ||
| + | |- | ||
| + | | 02CY415 | ||
| + | | 20 | ||
| + | | | ||
| + | | 2.4/3.8 | ||
| + | | 160 W | ||
| + | |- | ||
| + | | 02CY416 | ||
| + | | 18 | ||
| + | | | ||
| + | | 2.25/3.8 | ||
| + | | 130 W | ||
| + | |- | ||
| + | | 02CY417 | ||
| + | | 16 | ||
| + | | | ||
| + | | 2.3/3.8 | ||
| + | | 130 W | ||
| + | |- | ||
| + | | 02CY771 | ||
| + | | 12 | ||
| + | | | ||
| + | | 2.2/3.8 | ||
| 105 W | | 105 W | ||
|} | |} | ||
Revision as of 15:12, 2 May 2020
| Sforza | |
|---|---|
| Processor | POWER9 |
| Chip | Nimbus |
| Maximum base clock | 3.1GHz (4/8 core) |
| Maximum WOF clock | 3.8GHz (4/8 core) |
| Maximum TDP | 190W |
| PCIe controllers (PEC) | 3 |
| PCIe generation | 4 |
| Maximum PCIe lanes | 48 |
| Maximum PCIe endpoints | 6 |
| CAPI 2.0 interfaces | 2 |
| OpenCAPI interfaces | 0 |
| NVLink interfaces | 0 |
For more general information about the Nimbus chip this module contains, such as details about particular steppings, please see Nimbus.
Sforza is the codename for a POWER9, Nimbus chip, CPU module/package designed for general purpose computing, with high I/O available over standard PCIe generation 4 interfaces. The Nimbus chip it houses has 24 cores on the die, each capable of SMT4, and as a Scale Out processor intended for dual socket systems, uses directly attached RAM.
It is used by the Talos™ II systems.
Configurations
As with many CPUs, Nimbus-Sforza modules can be sold with some number of CPU cores disabled, and with different default clock speeds; at this time, no known Nimbus-Sforza parts are available with all 24 cores enabled.
| Part | SKU | Name | Cores | Stepping | TDP |
|---|---|---|---|---|---|
| 02CY297 | CP9M01 | IBM POWER9 CPU (4-Core) | 4 | DD2.2 | 90 W |
| 02CY089 | CP9M02 | IBM POWER9 CPU (8-Core) | 8 | DD2.2 | 160 W |
| 02CY489 | CP9M06 | IBM POWER9 CPU (18-Core) | 18 | DD2.2 | 190 W |
| 02CY296? | CP9M08 | IBM POWER9 CPU (22-Core) | 22 | DD2.2 | 190 W |
| CP9M31 | IBM POWER9 v2 CPU (4-Core) | 4 | DD2.3 | 90 W | |
| 02CY649 | CP9M32 | IBM POWER9 v2 CPU (8-Core) | 8 | DD2.3 | 160 W |
Much of the information about other Sforza parts comes from WikiChip
| Part | Cores | Stepping | GHz | TDP |
|---|---|---|---|---|
| 02CY771 | 12 | 105 W | ||
| 02AA986 | 16 | 2.9/3.8 | 190 W | |
| 02CY227 | 22 | 2.6/3.8 | 190 W | |
| 02CY228 | 20 | 2.7/3.8 | 190 W | |
| 02CY230 | 16 | 2.9/3.8 | 190 W | |
| 02CY414 | 22 | 2.25/3.8 | 160 W | |
| 02CY415 | 20 | 2.4/3.8 | 160 W | |
| 02CY416 | 18 | 2.25/3.8 | 130 W | |
| 02CY417 | 16 | 2.3/3.8 | 130 W | |
| 02CY771 | 12 | 2.2/3.8 | 105 W |
