Difference between revisions of "Power ISA/Privilege States"
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=== Ultravisor State === | === Ultravisor State === | ||
| − | + | Ultravisor State is a privilege mode part of the IBM Protected Execution Facility which enables support for SVMs (Secure Virtual Machines). | |
| − | + | It is relatively new, and is not mentioned in Power ISA version 2.07 documents at all, and version 3.0B only mentions it as a possible privilege of instructions. There already is source code available which references e.g. the existence of an ''Ultravisor State'' [[Power ISA/Machine State Register|Machine State Register]] bit.<ref>https://patchwork.ozlabs.org/patch/719952/</ref> It will probably be part of future revisions of the Power ISA. | |
| − | + | On March 22, 2018 IBM published an article about Protected Computing using the Ultravisor state at https://developer.ibm.com/articles/l-support-protected-computing/ | |
In October 2018, IBM gave a [https://www.youtube.com/watch?v=9ixMd9wwRrs talk about Ultravisor/Protected Execution Facility] at the Linux Security Summit. | In October 2018, IBM gave a [https://www.youtube.com/watch?v=9ixMd9wwRrs talk about Ultravisor/Protected Execution Facility] at the Linux Security Summit. | ||
| − | + | A report from IBM for the Air Force Research Laboratory indicates that the Ultravisor State was already tested in a modified [[POWER8|POWER8]] processor simulation.<ref>[[File:AFRL-RI-RS-TR-2017-021.pdf|HARDWARE SUPPORT FOR MALWARE DEFENSE AND END-TO-END TRUST]]. IBM. 2017-02</ref> | |
==== POWER9 ==== | ==== POWER9 ==== | ||
Revision as of 16:36, 7 August 2019
Contents
States
Ultravisor State
Ultravisor State is a privilege mode part of the IBM Protected Execution Facility which enables support for SVMs (Secure Virtual Machines).
It is relatively new, and is not mentioned in Power ISA version 2.07 documents at all, and version 3.0B only mentions it as a possible privilege of instructions. There already is source code available which references e.g. the existence of an Ultravisor State Machine State Register bit.[1] It will probably be part of future revisions of the Power ISA.
On March 22, 2018 IBM published an article about Protected Computing using the Ultravisor state at https://developer.ibm.com/articles/l-support-protected-computing/
In October 2018, IBM gave a talk about Ultravisor/Protected Execution Facility at the Linux Security Summit.
A report from IBM for the Air Force Research Laboratory indicates that the Ultravisor State was already tested in a modified POWER8 processor simulation.[2]
POWER9
IBM has confirmed to Raptor in direct messaging that the ultravisor state does not exist in POWER9, despite some material continuing to reference it. This information was also made public on Twitter.[3]
On March 22, 2018, a paper[4] was published on IBM developerWorks, explaining the reasoning for and the future use of the Ultravisor State.
Hypervisor State
Hypervisor State is indicated by the HV (bit 3) of the Machine State Register, and is normally used by a hypervisor. An operating system running without a hypervisor can run in Hypervisor State, with its userland in Problem State and avoid using Privileged State altogether.
Hypervisor State was introduced in POWER4, although for some time it was not included in documentation, appearing only as a reserved bit in the Machine State Register.[5]
Privileged State
Privileged State, also called Supervisor Mode, is normally used by an operating system running on top of a hypervisor.
Problem State
Problem State, also called User Mode, is indicated by the PR (bit 49) of the Machine State Register.
Instruction Classification
| Code | 2.07 | 3.0B | Description |
|---|---|---|---|
| P | Yes | Yes | a privileged instruction. |
| O | Yes | Yes | an instruction that is treated as privileged or nonprivileged (or hypervisor, for mtspr), depend-
ing on the SPR or PMR number. |
| PI | No | Yes | an instruction that is illegal in privileged state. |
| H | Yes | Yes | an instruction that can be executed only in hypervisor state |
| PH | Yes | No | a hypervisor privileged instruction if Category Embedded.Hypervisor is implemented; otherwise
denotes a privileged instruction. |
| M | Yes | No | an instruction that is treated as privileged or nonprivileged, depending on the value of the UCLE
bit in the MSR |
| U | No | Yes | an instruction that can be executed only in ultravisor state |
- US Patent Application 20190034666 - HARDWARE BASED ISOLATION FOR SECURE EXECUTION OF VIRTUAL MACHINES - Local Full-Text PDF w/ Illustrations: File:US020190034666A120190131-HARDWARE-BASED-ISOLATION-FOR-SECURE-EXECUTION-OF-VIRTUAL-MACHINES.pdf
- Hostboot Bootloader - Secure Memory Facility/Ultravisor Configuration References
References
- ↑ https://patchwork.ozlabs.org/patch/719952/
- ↑ File:AFRL-RI-RS-TR-2017-021.pdf. IBM. 2017-02
- ↑ Lynn, Justin. tweet
- ↑ Guerney D. H. Hunt, Richard (Rick) H. Boivie, Elaine Rivette Palmer, Dimitrios Pendarakis https://www.ibm.com/developerworks/library/l-support-protected-computing/ Supporting protected computing on IBM Power Architecture
- ↑ Kerr, Jeremy. OpenPOWER: building an open-source software stack from bare metal (video). Linux.conf.au 2015
