Difference between revisions of "OpenPOWER Firmware"

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(Add column indicating where each piece of firmware is loaded from (i.e. where it is stored when the system is powered down))
Line 7: Line 7:
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
 
! Firmware
 
! Firmware
! Runtime Location
+
! Executed on
 +
! Loaded from
 
! Function
 
! Function
 
|-
 
|-
 
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)
 
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)
 
| SBE core (on CPU chip)
 
| SBE core (on CPU chip)
 +
| SEEPROM
 
|
 
|
 
* initialises CPU core
 
* initialises CPU core
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| [[Hostboot|Hostboot]]
 
| [[Hostboot|Hostboot]]
 
| CPU core
 
| CPU core
 +
| SPI Flash
 
|
 
|
 
* loads Skiboot
 
* loads Skiboot
Line 24: Line 27:
 
| [[Skiboot|Skiboot]]
 
| [[Skiboot|Skiboot]]
 
| CPU core
 
| CPU core
 +
|
 
|
 
|
 
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services
 
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services
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| [[Petitboot|Petitboot]]
 
| [[Petitboot|Petitboot]]
 
| CPU core
 
| CPU core
 +
|
 
|
 
|
 
* boot menu
 
* boot menu
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| [[On-Chip Controller|On-Chip Controller]] (OCC)
 
| [[On-Chip Controller|On-Chip Controller]] (OCC)
 
| OCC core (on CPU chip)
 
| OCC core (on CPU chip)
 +
|
 
|
 
|
 
* thermal regulation on CPU chip
 
* thermal regulation on CPU chip

Revision as of 15:39, 30 July 2018

OpenPOWER Firmware is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.[1] It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.[2]

OpenBMC is a separate project that creates firmware for the Baseboard Management Controller.

Components

Firmware Executed on Loaded from Function
Self-Boot Engine (SBE) SBE core (on CPU chip) SEEPROM
  • initialises CPU core
  • loads Hostboot
Hostboot CPU core SPI Flash
  • loads Skiboot
  • inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer
Skiboot CPU core
  • implements OpenPOWER Abstraction Layer (OPAL) for OS runtime services
  • setup PCIe, device tree, real time clock, NVlink, sensors
  • loads Petitboot, OCC
Petitboot CPU core
  • boot menu
  • loads operating system
On-Chip Controller (OCC) OCC core (on CPU chip)
  • thermal regulation on CPU chip

Process

  1. OpenBMC starts SBE
  2. SBE loads Hostboot
  3. Hostboot loads Skiboot
  4. Skiboot loads OCC, Petitboot
  5. Petitboot loads the operating system
  6. operating system talks to firmware through OPAL

References

See also

External Links