Difference between revisions of "Turismo"
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| Line 4: | Line 4: | ||
|label2 = Processor | |label2 = Processor | ||
|data2 = [[POWER8|POWER8]] | |data2 = [[POWER8|POWER8]] | ||
| − | |label3 = | + | |label3 = Structure |
| − | |data3 = | + | |data3 = [[SCM|SCM]] |
| − | |label4 = Maximum | + | |label4 = Maximum base clock |
|data4 = - | |data4 = - | ||
| − | |label5 = Maximum | + | |label5 = Maximum turbo clock |
|data5 = - | |data5 = - | ||
| − | |label6 = | + | |label6 = Maximum [[TDP|TDP]] |
|data6 = - | |data6 = - | ||
| − | |label7 = PCIe generation | + | |label7 = PCIe controllers ([[PEC|PEC]]) |
| − | | | + | |data7 = - |
| − | | | + | |label8 = PCIe generation |
| − | | | + | |data8 = 3 |
| − | | | + | |label9 = Maximum PCIe lanes |
| − | | | + | |data9 = 40 |
| − | | | + | |label10 = Maximum PCIe endpoints |
| − | | | + | |data10 = 3 |
| − | + | |label11 = [[CAPI|CAPI]] interfaces | |
| − | + | |data11 = 2 | |
}} | }} | ||
