Difference between revisions of "Monza"
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JeremyRand (talk | contribs) (Add Nimbus link) |
JeremyRand (talk | contribs) (→External Links: Add WikiChip link) |
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* [https://www-355.ibm.com/systems/power/openpower/tgcmDocumentRepository.xhtml?aliasId=POWER9_Monza Monza Module at IBM OpenPOWER portal] | * [https://www-355.ibm.com/systems/power/openpower/tgcmDocumentRepository.xhtml?aliasId=POWER9_Monza Monza Module at IBM OpenPOWER portal] | ||
| + | * [https://en.wikichip.org/wiki/ibm/cores/monza WikiChip page for Monza] | ||
== References == | == References == | ||
Revision as of 08:58, 6 September 2022
| Monza | |
|---|---|
| Processor | POWER9 |
| Chip | Nimbus |
| Maximum base clock | - |
| Maximum WOF clock | - |
| Maximum TDP | - |
| PCIe controllers (PEC) | - |
| PCIe generation | 4 |
| Maximum PCIe lanes | 34 |
| Maximum PCIe endpoints | - |
| CAPI 2.0 interfaces | - |
| OpenCAPI/NVLink lanes | 48 |
| OpenCAPI interfaces | 6 |
| NVLink interfaces | 3 |
Configurations
Known Nimbus-Monza parts[1]:
- 00NJ261
- 00UL016
- 00UL017
- 00UL018
- 00UL020
- 00UL021
