Difference between revisions of "LaGrange"

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(add nimbus chip)
(https://www.reddit.com/r/OpenPOWER/comments/7f6upp/heres_how_to_mine_monero_xmr_on_openpower_and_it/dqcd1o5/)
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|label11 = [[CAPI 2.0|CAPI 2.0]] interfaces
 
|label11 = [[CAPI 2.0|CAPI 2.0]] interfaces
 
|data11 = -
 
|data11 = -
|label12 = [[OpenCAPI|OpenCAPI]] interfaces
+
|label12 = [[OpenCAPI|OpenCAPI]]/[[NVLink|NVLink]] lanes
|data12 = -
+
|data12 = 16
|label13 = [[NVLink|NVLink]] interfaces
+
|label13 = [[OpenCAPI|OpenCAPI]] interfaces
|data13 = -
+
|data13 = 2
 +
|label14 = [[NVLink|NVLink]] interfaces
 +
|data14 = 1
 
}}
 
}}
  
 
[[Category:Nimbus Modules]]
 
[[Category:Nimbus Modules]]

Revision as of 10:03, 29 December 2017

Package Information
LaGrange
Processor POWER9
Chip Nimbus
Maximum base clock -
Maximum WOF clock -
Maximum TDP -
PCIe controllers (PEC) -
PCIe generation 4
Maximum PCIe lanes 42
Maximum PCIe endpoints -
CAPI 2.0 interfaces -
OpenCAPI/NVLink lanes 16
OpenCAPI interfaces 2
NVLink interfaces 1