Difference between revisions of "Power ISA"

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Revision as of 09:11, 20 March 2019

Power ISA is the specification for how Power architecture processors are to behave. It dictates the machine instructions available, and exactly how they are to process given data.

There are two primary versions of the Power ISA that are of interest to PowerNV platforms:

History

The Power ISA evolved from the PowerPC ISA which in turn was an evolution of the POWER ISA used by POWER1 and POWER2 chips.

POWER ISA → PowerPC ISA → Power ISA

When the Power ISA 3.0B specification lists all available instructions, it specifically mentions what version of which architecture introduced the instruction; this gives a fairly quick history of the ISA itself:

Key to Version column in Power ISA 3.0B instruction list
Code Specification Compliant cores
P1 POWER Architecture
P2 POWER2 Architecture
PPC PowerPC Architecture prior to v2.00
v2.00 PowerPC Architecture v2.00
v2.01 PowerPC Architecture v2.01
v2.02 PowerPC Architecture v2.02
v2.03 Power ISA v2.03 PPC405, PPC440, PPC460, PPC970, Cell PPE, e200, e500, POWER5
v2.04 Power ISA v2.04
v2.05 Power ISA v2.05 POWER6
v2.06 Power ISA v2.06 e5500, POWER7
v2.06B Power ISA v2.06B
v2.07 Power ISA v2.07 e6500, POWER8
v2.07B Power ISA v2.07B
v3.0 Power ISA v3.0
v3.0B Power ISA v3.0B POWER9

See also

External Links