Difference between revisions of "POWER8E"

From RCS Wiki
Jump to navigation Jump to search
(Created page with "{{Infobox |title = Processor Information |header1 = POWER8E |label2 = POWER ISA |data2 = 2.07 |label3 = Process node |data3 = 22nm |label4 = Maximum slices |data4...")
 
(Add part numbers)
 
(9 intermediate revisions by 3 users not shown)
Line 2: Line 2:
 
|title = Processor Information
 
|title = Processor Information
 
|header1 = POWER8E
 
|header1 = POWER8E
|label2 = [[PowerISA|POWER ISA]]
+
|label2 = [[Power ISA|Power ISA]]
 
|data2 = 2.07
 
|data2 = 2.07
 
|label3 = Process node
 
|label3 = Process node
Line 21: Line 21:
 
|data10 = [[POWER9|POWER9 →]]
 
|data10 = [[POWER9|POWER9 →]]
 
}}
 
}}
 +
 +
'''POWER8E''' (also known as '''POWER8 with NVLink''', '''POWER8’''' (with a prime symbol), '''8335-GTB POWER8''', or '''POWER8+''') processors have a different socket than standard POWER8 chips.
 +
 +
Compared to a standard POWER8 Single Chip Module (SCM), the POWER8 with NVLink modifies:
 +
 +
* 2<sup>nd</sup> CAPP unit added, X2 removed
 +
* x8 PHB
 +
* x8 IOP
 +
* A-bus removed, NVLink added
 +
* NVLink support added in extended ES
 +
* Chip height: 2 C4 rows added
 +
 +
Without A-bus or SMP over PCIe, the processors in a multisocket configuration instead use X-Bus for SMP. The chip size is 659 mm<sup>2</sup>, rather than 649 mm<sup>2</sup> for POWER8, and only available for the ''S822LC for HPC'', specifically the ''8335-GTB'' model.
 +
<ref>Caldeira, Alexandre Bicas; Haug, Volker. [https://www.redbooks.ibm.com/redpapers/pdfs/redp5405.pdf IBM Power System S822LC for High Performance Computing Introduction and Technical Overview] (PDF). IBM Redpaper. ISBN 9780738455617.</ref><ref>Gupta, Sumit. [https://www.ibm.com/blogs/systems/ibm-nvidia-present-nvlink-server-youve-waiting/ IBM & NVIDIA present the NVLink server you’ve been waiting for] (HTML). 2016-09-08. IBM IT Infrastructure Blog.</ref>
 +
 +
== Configurations ==
 +
 +
{| class="wikitable sortable"
 +
|+ Known POWER8E parts
 +
! Part
 +
! Cores
 +
|-
 +
| 00UL668
 +
| 10
 +
|-
 +
| 00UL670
 +
| 8
 +
|}
 +
 +
Sourced from [[:File:POWER8 wNVLink DS v1.7 11DEC2017 pub.pdf|POWER8E data sheet v1.7]] (see Table 6-2 on page 65).
 +
 +
== External Links ==
 +
 +
* [https://www-355.ibm.com/systems/power/openpower/tgcmDocumentRepository.xhtml?aliasId=POWER8_with_NVIDIA_NVLink POWER8 with NVLink at IBM OpenPOWER portal]
 +
* [https://en.wikipedia.org/wiki/POWER8#POWER8_with_NVLink POWER8 with NVLink section of Wikipedia POWER8 article]
 +
 +
== References ==
 +
<references/>
 +
[[Category:POWER]]

Latest revision as of 00:18, 20 September 2022

Processor Information
POWER8E
Power ISA 2.07
Process node 22nm
Maximum slices 12
Maximum cores 12 SMT8
L2 cache / slice 512kB
L3 cache / slice 8MB
Production availability 2016
Production stepping(s) DD2.1
← POWER8 POWER9 →

POWER8E (also known as POWER8 with NVLink, POWER8’ (with a prime symbol), 8335-GTB POWER8, or POWER8+) processors have a different socket than standard POWER8 chips.

Compared to a standard POWER8 Single Chip Module (SCM), the POWER8 with NVLink modifies:

  • 2nd CAPP unit added, X2 removed
  • x8 PHB
  • x8 IOP
  • A-bus removed, NVLink added
  • NVLink support added in extended ES
  • Chip height: 2 C4 rows added

Without A-bus or SMP over PCIe, the processors in a multisocket configuration instead use X-Bus for SMP. The chip size is 659 mm2, rather than 649 mm2 for POWER8, and only available for the S822LC for HPC, specifically the 8335-GTB model. [1][2]

Configurations

Known POWER8E parts
Part Cores
00UL668 10
00UL670 8

Sourced from POWER8E data sheet v1.7 (see Table 6-2 on page 65).

External Links

References

  1. Caldeira, Alexandre Bicas; Haug, Volker. IBM Power System S822LC for High Performance Computing Introduction and Technical Overview (PDF). IBM Redpaper. ISBN 9780738455617.
  2. Gupta, Sumit. IBM & NVIDIA present the NVLink server you’ve been waiting for (HTML). 2016-09-08. IBM IT Infrastructure Blog.