Difference between revisions of "POWER10"
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* [https://newsroom.ibm.com/2020-08-17-IBM-Reveals-Next-Generation-IBM-POWER10-Processor IBM Announcement] | * [https://newsroom.ibm.com/2020-08-17-IBM-Reveals-Next-Generation-IBM-POWER10-Processor IBM Announcement] | ||
* [https://www.theregister.com/2020/08/17/ibm_t7nm_power10/ TheRegister.com] | * [https://www.theregister.com/2020/08/17/ibm_t7nm_power10/ TheRegister.com] | ||
| + | * [https://www.nextplatform.com/2020/08/18/ibm-brings-an-architecture-gun-to-a-chip-knife-fight/ TheNextPlatform.com] | ||
Latest revision as of 18:15, 21 August 2020
| POWER10 | |
|---|---|
| Power ISA | 3.1[1] |
| Process node | Samsung 7nm[1] |
| Maximum cores | 15 SMT8 / 30 SMT4 |
| ← POWER9 | POWER11 → |
While very little public information is currently available about POWER10, initial support being added to the QEMU emulator suggests that it will be implementing the yet (as of 2020-05) unreleased Power ISA 3.10 or later.[2]
Some details were revealed at the HotChips conference, see [3]
References
- ↑ 1.0 1.1 Cutress, Ian. Hot Chips 2020 Live Blog: IBM's POWER10 Processor on Samsung 7nm (10:00am PT). Anandtech. 2020-08-17
- ↑ ClassicHasClass. QEMU ADDS POWER10 SUPPORT. Talospace. 2020-05-03.
- ↑ slides, TheRegister. 2020-08-17.
