Difference between revisions of "Murano"

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[[Category:Modules]]
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[[Category:Modules]][[Category:POWER8]]

Latest revision as of 14:24, 2 March 2019

Package Information
Murano
Processor POWER8
Structure DCM
Maximum base clock -
Maximum turbo clock -
Maximum TDP -
PCIe controllers (PEC) -
PCIe generation 3
Maximum PCIe lanes -
Maximum PCIe endpoints -
CAPI interfaces -