https://wiki.raptorcs.com/w/api.php?action=feedcontributions&user=Western+Semiconductor&feedformat=atomRCS Wiki - User contributions [en]2024-03-28T23:45:41ZUser contributionsMediaWiki 1.33.1https://wiki.raptorcs.com/w/index.php?title=Porting/Chromium_(Old)&diff=1671Porting/Chromium (Old)2018-09-22T11:02:46Z<p>Western Semiconductor: </p>
<hr />
<div>* '''Chromium-dev thread'''<br />
** https://groups.google.com/a/chromium.org/d/msg/chromium-dev/MYq1DPz9Tak/Xc9fotObCwAJ<br />
<br />
* '''Issues opened:'''<br />
** https://bugs.chromium.org/p/chromium/issues/detail?id=871084<br />
** https://bugs.chromium.org/p/chromium/issues/detail?id=872534<br />
** https://bugs.chromium.org/p/chromium/issues/detail?id=872994<br />
<br />
* '''Patchfiles uploaded (Chromium Tree):'''<br />
** build/toolchain<br />
*** https://wiki.raptorcs.com/wiki/File:Binutils-download.py-PPC.patch<br />
*** https://wiki.raptorcs.com/wiki/File:Src-DEPS.patch changes are pending upstream (https://bugs.chromium.org/p/chromium/issues/detail?id=871084#c7)<br />
*** https://wiki.raptorcs.com/wiki/File:0006-build-toolchain-allow-clang-on-ppc64.patch<br />
** sandbox<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-linux-bpf_dsl-Update-syscall-ranges-for-ppc6.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0002-sandbox-linux-bpf_dsl-Modify-seccomp_macros-to-add-s.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0003-sandbox-linux-system_headers-Update-linux-seccomp-he.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0004-sandbox-linux-system_headers-Update-linux-signal-hea.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0005-sandbox-linux-seccomp-bpf-Add-ppc64-syscall-stub.patch<br />
*** https://wiki.raptorcs.com/wiki/File:Sandbox-linux-services-credentials.cc-PPC.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-Enable-seccomp_bpf-for-ppc64.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-linux-Implement-partial-support-for-ppc64-sy.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-linux-seccomp-bpf-helpers-Fix-TCGETS-declara.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-linux-seccomp-bpf-helpers-Skip-vserver-sysca.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-services-service_manager-sandbox-linux-Fix-TCGETS-de.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0005-sandbox-linux-update-unit-test-for-ppc64.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-sandbox-linux-Update-syscall-helpers-lists-for-ppc64.patch<br />
** Update client<br />
*** https://wiki.raptorcs.com/wiki/File:0001-components-update_client-Fix-building-on-ppc64.patch<br />
** Page allocator<br />
*** https://wiki.raptorcs.com/wiki/File:0001-base-allocator-Use-64k-page-sizes-on-ppc64.patch<br />
** Database<br />
*** https://wiki.raptorcs.com/wiki/File:0001-Properly-detect-little-endian-PPC64-systems.patch<br />
** WebRTC<br />
*** https://wiki.raptorcs.com/wiki/File:Modules-desktop_capture-differ_block.cc-PPC.patch changes are pending upstream (https://bugs.chromium.org/p/chromium/issues/detail?id=872994)<br />
*** https://wiki.raptorcs.com/wiki/File:Buildtools-third_party-libc%2B%2B-trunk-include-thread-PPC.patch<br />
*** https://wiki.raptorcs.com/wiki/File:Rtc_base-system-arch.h-PPC.patch changes are pending upstream (https://bugs.chromium.org/p/chromium/issues/detail?id=872994)<br />
** third_party<br />
*** https://wiki.raptorcs.com/wiki/File:0001-third_party-angle-Include-missing-header-cstddef-in-.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-third_party-lss-Don-t-look-for-mmap2-on-ppc64.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-DONTMERGE-third_party-node-Use-system-nodejs-binary.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0002-third_party-closure_compiler-Remove-useless-JVM-flag.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-third_party-blink-Fix-build-on-ppc64.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-Reenable-VSX-in-libpng.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-third_party-libvpx-Properly-generate-gni-on-ppc64.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-third_party-blink-Add-SaveRegisters-implementation-w.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0002-third_party-libvpx-Add-ppc64-sources-to-gni.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-Apply-blink-64k-page-workaround-to-ppc64-systems.patch<br />
*** https://wiki.raptorcs.com/wiki/File:0001-Force-baseline-POWER8-AltiVec-VSX-CPU-features-when-.patch<br />
** Workarounds<br />
*** https://wiki.raptorcs.com/wiki/File:Chromium-blink-snapcontainerdata.patch (GCC BUILD ONLY)<br />
*** https://wiki.raptorcs.com/wiki/File:0004-appcache-remove-constexpr-foror-functions-that-use-s.patch<br />
<br />
* '''Patchfiles uploaded (Breakpad Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-Implement-ppc64-support-on-linux.patch<br />
<br />
* '''Patchfiles uploaded (LSS Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-WIP-ppc64-support.patch<br />
<br />
* '''Patchfiles uploaded (Crashpad Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-Implement-support-for-PPC64-on-Linux.patch<br />
** https://wiki.raptorcs.com/wiki/File:0002-Include-cstddef-to-fix-build.patch<br />
<br />
* '''Patchfiles uploaded (Chromium's ffmpeg Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-Add-support-for-ppc64.patch<br />
** https://wiki.raptorcs.com/wiki/File:0001-third_party-ffmpeg-Add-pre-generated-ppc64-configura.patch<br />
<br />
* '''Patchfiles uploaded (v8 Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-DONTMERGE-Disable-v8-unit-tests.patch<br />
<br />
* '''Patchfiles uploaded (pdfium Tree):'''<br />
** https://wiki.raptorcs.com/wiki/File:0001-Add-spin-yield-support-for-ppc64.patch<br />
<br />
* '''What to port to ppc'''<br />
** <del>nacl</del> (Not porting since it's been deprecated by Google.)<br />
<br />
<nowiki><br />
<br />
# Install Ubuntu 18.04 (Bionic Beaver) LTS ppc64le in VM with good amount of CPUs and ~16GB RAM, the more CPUs the more RAM, and around 200GB disk space<br />
<br />
sudo apt update<br />
sudo apt full-upgrade<br />
sudo apt install git vim python libcups2-dev pkg-config libnss3-dev libssl-dev libglib2.0-dev libgnome-keyring-dev libpango1.0-dev libdbus-1-dev libatk1.0-dev libatk-bridge2.0-dev libgtk-3-dev libkrb5-dev libpulse-dev libxss-dev re2c subversion curl libasound2-dev libpci-dev mesa-common-dev gperf bison nodejs uuid-dev<br />
<br />
##begin alternate - use a xenial-chroot instead of a VM<br />
#Create chroot<br />
sudo debootstrap --include=software-properties-common xenial xenial-chroot http://us.ports.ubuntu.com/ubuntu-ports/ubuntu-ports/ <br />
<br />
#must be mapped for chroot to function properly<br />
sudo mount -t proc none xenial-chroot/proc/<br />
sudo mount -o bind /sys/ xenial-chroot/sys/<br />
sudo mount -o bind /dev/shm/ xenial-chroot/dev/shm/<br />
<br />
#enter chroot<br />
sudo chroot xenial-chroot<br />
<br />
#add additional apt sources<br />
echo "deb http://us.ports.ubuntu.com/ubuntu-ports/ubuntu-ports xenial-updates main" >> /etc/apt/sources.list<br />
echo "deb http://us.ports.ubuntu.com/ubuntu-ports/ubuntu-ports xenial universe" >> /etc/apt/sources.list<br />
echo "deb http://us.ports.ubuntu.com/ubuntu-ports/ubuntu-ports xenial-updates universe" >> /etc/apt/sources.list<br />
<br />
#update and add software as mentioned above<br />
apt update<br />
apt full-upgrade<br />
apt install <packages listed above><br />
<br />
#add chroot user<br />
useradd -m build-user -s /bin/bash<br />
su build-user<br />
echo 'cd' >> ~/.bashrc<br />
cd<br />
##end alternate - use a xenial-chroot instead of a VM<br />
<br />
<br />
cd<br />
git clone https://chromium.googlesource.com/chromium/tools/depot_tools.git<br />
<br />
echo 'export PATH="$PATH:${HOME}/ninja"' >> ~/.bashrc<br />
echo 'export PATH="$PATH:${HOME}/depot_tools"' >> ~/.bashrc<br />
echo 'export VPYTHON_BYPASS="manually managed python not supported by chrome operations"' >> ~/.bashrc<br />
echo 'export GYP_DEFINES="disable_nacl=1"' >> ~/.bashrc<br />
. ~/.bashrc<br />
<br />
git clone git://github.com/ninja-build/ninja.git<br />
cd ninja<br />
git checkout release<br />
./configure.py --bootstrap<br />
which ninja # ensure it is right ninja bin, else figure out a way so it is the right one that comes up<br />
<br />
<br />
cd<br />
git clone https://gn.googlesource.com/gn<br />
<br />
export CC=gcc<br />
export CXX=g++<br />
export AR=ar<br />
<br />
cd gn<br />
python build/gen.py --no-sysroot<br />
cat out/build.ninja | sed s/-stdlib=libstdc++//g | tee out/build.ninja<br />
ninja -C out<br />
<br />
unset CXX<br />
unset CC<br />
unset AR<br />
<br />
# Setup clang (HIGHLY RECOMMENDED)<br />
# Building chromium with gcc is an uphill battle as the devs only test with clang.<br />
# It is possible to set up a local clang compiler with the exact revision chromium expects by doing the following:<br />
<br />
# Check out LLVM (rev 340925)<br />
svn checkout --force https://llvm.org/svn/llvm-project/llvm/trunk@340925 llvm<br />
<br />
# Check out Clang (rev 340925)<br />
svn checkout --force https://llvm.org/svn/llvm-project/cfe/trunk@340925 llvm/tools/clang<br />
<br />
# Check out compiler-rt (rev 340925)<br />
svn checkout --force https://llvm.org/svn/llvm-project/compiler-rt/trunk@340925 llvm/compiler-rt<br />
<br />
# Make build directory and build<br />
mkdir llvm_build<br />
cd llvm_build<br />
cmake -DCMAKE_BUILD_TYPE=Release -DLLVM_TARGETS_TO_BUILD="PowerPC" -G "Unix Makefiles" ../llvm<br />
make -j64 # Replace with no. of threads in your box<br />
<br />
# Work around libatomic problems under Clang<br />
# See https://github.com/cquery-project/cquery/issues/382 for a related problem in a different project<br />
cd /usr/lib/powerpc64le-linux-gnu<br />
ln -s libatomic.so.1 libatomic.so<br />
<br />
# Setup and build chromium tree<br />
cd<br />
mkdir chromium<br />
cd chromium<br />
<br />
# The following command will fail with a message "failed to resolve package version".<br />
# Once it does, simply continue following the instructions. The subsequent patches will resolve the issue.<br />
fetch --no-history --nohooks chromium<br />
<br />
curl "https://wiki.raptorcs.com/w/images/4/45/Src-DEPS.patch" | patch -p1 src/DEPS # If this patchfile stops working, ignore the error, see "Patchfiles uploaded"<br />
curl "https://wiki.raptorcs.com/w/images/1/10/Binutils-download.py-PPC.patch" | patch -p1 src/third_party/binutils/download.py<br />
<br />
gclient sync<br />
gclient runhooks<br />
<br />
mv src/buildtools/linux64/gn src/buildtools/linux64/gn.old<br />
ln -s $HOME/gn/out/gn src/buildtools/linux64/gn<br />
<br />
cd src<br />
<br />
# build system patches<br />
curl "https://wiki.raptorcs.com/w/images/6/69/Buildtools-third_party-libc%2B%2B-trunk-include-thread-PPC.patch" | patch -p1 buildtools/third_party/libc++/trunk/include/thread<br />
curl "https://wiki.raptorcs.com/w/images/5/5c/0006-build-toolchain-allow-clang-on-ppc64.patch" | patch -p1<br />
<br />
# breakpad fix<br />
cd third_party/breakpad/breakpad<br />
curl "https://wiki.raptorcs.com/w/images/f/f7/0001-Implement-ppc64-support-on-linux.patch" | patch -p1<br />
cd ../../..<br />
<br />
# crashpad fix<br />
cd third_party/crashpad/crashpad<br />
curl "https://wiki.raptorcs.com/w/images/8/88/0001-Implement-support-for-PPC64-on-Linux.patch" | patch -p1<br />
cd ../../..<br />
curl "https://wiki.raptorcs.com/w/images/6/6e/0002-Include-cstddef-to-fix-build.patch" | patch -p1<br />
<br />
# webrtc patches<br />
curl "https://wiki.raptorcs.com/w/images/b/b2/Rtc_base-system-arch.h-PPC.patch" | patch -p1 third_party/webrtc/rtc_base/system/arch.h<br />
curl "https://wiki.raptorcs.com/w/images/9/96/Modules-desktop_capture-differ_block.cc-PPC.patch" | patch -p1 third_party/webrtc/modules/desktop_capture/differ_block.cc<br />
<br />
# sandbox patches<br />
curl "https://wiki.raptorcs.com/w/images/a/ab/0001-sandbox-linux-bpf_dsl-Update-syscall-ranges-for-ppc6.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/3/30/0002-sandbox-linux-bpf_dsl-Modify-seccomp_macros-to-add-s.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/6/60/0003-sandbox-linux-system_headers-Update-linux-seccomp-he.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/e/ec/0004-sandbox-linux-system_headers-Update-linux-signal-hea.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/b/b3/0005-sandbox-linux-seccomp-bpf-Add-ppc64-syscall-stub.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/f/f5/Sandbox-linux-services-credentials.cc-PPC.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/b/be/0001-sandbox-Enable-seccomp_bpf-for-ppc64.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/3/38/0001-sandbox-linux-Implement-partial-support-for-ppc64-sy.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/b/bb/0001-sandbox-linux-seccomp-bpf-helpers-Fix-TCGETS-declara.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/e/e7/0001-sandbox-linux-seccomp-bpf-helpers-Skip-vserver-sysca.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/4/43/0001-sandbox-linux-Update-syscall-helpers-lists-for-ppc64.patch" | patch -p1<br />
<br />
# service_manager patches<br />
curl "https://wiki.raptorcs.com/w/images/c/c9/0001-services-service_manager-sandbox-linux-Fix-TCGETS-de.patch" | patch -p1<br />
<br />
# third_party patches<br />
curl "https://wiki.raptorcs.com/w/images/8/8a/0001-third_party-angle-Include-missing-header-cstddef-in-.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/f/fc/0001-third_party-lss-Don-t-look-for-mmap2-on-ppc64.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/8/8d/0001-DONTMERGE-third_party-node-Use-system-nodejs-binary.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/0/0b/0002-third_party-closure_compiler-Remove-useless-JVM-flag.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/5/5f/0001-third_party-blink-Fix-build-on-ppc64.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/8/84/0001-components-update_client-Fix-building-on-ppc64.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/0/02/0001-Reenable-VSX-in-libpng.patch" | patch -p1<br />
<br />
# page size fixes<br />
curl "https://wiki.raptorcs.com/w/images/f/f3/0001-base-allocator-Use-64k-page-sizes-on-ppc64.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/5/5c/0001-Apply-blink-64k-page-workaround-to-ppc64-systems.patch" | patch -p1<br />
<br />
# libvpx fix<br />
curl "https://wiki.raptorcs.com/w/images/8/80/0001-third_party-libvpx-Properly-generate-gni-on-ppc64.patch" | patch -p1<br />
cd third_party/libvpx<br />
mkdir source/config/linux/ppc64<br />
./generate_gni.sh<br />
cd ../../<br />
<br />
# pdfium fix<br />
cd third_party/pdfium<br />
curl "https://wiki.raptorcs.com/w/images/4/41/0001-Add-spin-yield-support-for-ppc64.patch" | patch -p1<br />
cd ../..<br />
<br />
# v8 fixes<br />
cd v8<br />
curl "https://wiki.raptorcs.com/w/images/3/3c/0001-DONTMERGE-Disable-v8-unit-tests.patch" | patch -p1<br />
curl "https://wiki.raptorcs.com/w/images/b/b0/0001-Force-baseline-POWER8-AltiVec-VSX-CPU-features-when-.patch" | patch -p1<br />
cd ..<br />
<br />
# database fix<br />
curl "https://wiki.raptorcs.com/w/images/d/df/0001-Properly-detect-little-endian-PPC64-systems.patch" | patch -p1<br />
<br />
# blink fix<br />
curl "https://wiki.raptorcs.com/w/images/a/aa/0001-third_party-blink-Add-SaveRegisters-implementation-w.patch" | patch -p1<br />
<br />
### GCC ONLY! <br />
<br />
# quic fix https://bugs.chromium.org/p/chromium/issues/detail?id=882347&can=2&q=gcc&colspec=ID%20Pri%20M%20Stars%20ReleaseBlock%20Component%20Status%20Owner%20Summary%20OS%20Modified<br />
git checkout 7b4f22bd25461cb32236c07699b029c7411ba494 -- net/third_party/quic/core/frames/quic_frame.h<br />
<br />
# blink gcc fix https://bugs.chromium.org/p/chromium/issues/detail?id=882161#<br />
curl "https://wiki.raptorcs.com/w/images/d/de/Chromium-blink-snapcontainerdata.patch" | patch -p1<br />
<br />
### END GCC ONLY<br />
<br />
gn args out/Default<br />
<br />
# PASTE IN EDITOR<br />
<br />
# Release mode<br />
is_component_build = false<br />
is_debug = false<br />
<br />
# Disable broken features<br />
enable_nacl = false<br />
treat_warnings_as_errors = false<br />
<br />
# For clang, add the following lines:<br />
is_clang = true<br />
clang_base_path = "/path/to/your/llvm_build"<br />
clang_use_chrome_plugins = false<br />
<br />
<br />
# END PASTE Save file and it will generate build configuration<br />
<br />
# ffmpeg fix (see https://docs.google.com/document/d/14bqZ9NISsyEO3948wehhJ7wc9deTIz-yHUhF1MQp7Po/edit#heading=h.t7yeo9by5dyr for info on build system)<br />
cd third_party/ffmpeg<br />
# OPTION 1 - Manually generate configuration<br />
curl "https://wiki.raptorcs.com/w/images/7/7b/0001-Add-support-for-ppc64.patch" | patch -p1<br />
./chromium/scripts/generate_gn.py<br />
./chromium/scripts/build_ffmpeg.py linux ppc64<br />
./chromium/scripts/copy_config.sh <br />
# END OPTION 1<br />
# OPTION 2 - Apply pre-generated configuration<br />
curl "https://wiki.raptorcs.com/w/images/2/20/0001-third_party-ffmpeg-Add-pre-generated-ppc64-configura.patch" | patch -p1<br />
# END OPTION 2<br />
cd ../../<br />
<br />
# Build Chromium<br />
ninja -C out/Default chrome<br />
<br />
# Clean everything to do a rebuild<br />
ninja -C out/Default -t clean<br />
</nowiki><br />
<br />
* '''Notes about QT WebEngine''' by [[User:Sharkcz|Sharkcz]]<br />
** patches mentioned here can be used for building QT WebEngine (5.11.2 from http://code.qt.io/qt/qtwebengine.git), chromium 69-based<br />
** had to set "use_jumbo_build = false" to workaround a build issue in V8, somehow it converted mul into mulld and div into divd, leading to errors like " kExprF32Mulld not defined"<br />
** have problems building ffmpeg, so the final link failed<br />
*** seems the steps for ffmpeg are (because generate_gn reads the results of a build, needs clang in the default config => modified to use gcc, clang causes issues with missing symbols<br />
**** build_ffmpeg.py linux ppc64<br />
**** generate_gn.py<br />
**** copy_config.sh <br />
** https://wiki.raptorcs.com/wiki/File:Qtwebengine.patch - for WebEngine itself<br />
** https://wiki.raptorcs.com/wiki/File:Webengine-chromium.patch - for the bundled Chromium (**Note:** this contains an outdated version of the 0005-sandbox-linux-seccomp-bpf-Add-ppc64-syscall-stub patch above which does not work -- you must use the updated one dated 21-Sep from above or you will get runtime linker failures)<br />
*** rename third_party/ffmpeg/ffmpeg_generated.gni.ppc64 to ffmpeg_generated.gni - this is a preparation for packaging work, ideally we would need a complete ffmpeg_generated.gni regenerated for all arches<br />
*** PushAllRegisters() needs a real implementation<br />
** how to use<br />
*** apply the patchsets<br />
*** qmake-qt5<br />
*** make<br />
*** wait a while and then enjoy :-)<br />
** https://src.fedoraproject.org/fork/sharkcz/rpms/qt5-qtwebengine/commits/ppc is my work in progress on the Fedora qt5-qtwebengine package<br />
** https://koji.fedoraproject.org/koji/taskinfo?taskID=29540352 is temporary location for the result<br />
<br />
<nowiki><br />
[sharkcz@guest05 lib]$ ll *5.11.2<br />
-rwxrwxr-x. 1 sharkcz sharkcz 262536744 Sep 7 12:03 libQt5WebEngineCore.so.5.11.2<br />
-rwxrwxr-x. 1 sharkcz sharkcz 11645504 Sep 7 12:04 libQt5WebEngine.so.5.11.2<br />
-rwxrwxr-x. 1 sharkcz sharkcz 7154392 Sep 7 12:05 libQt5WebEngineWidgets.so.5.11.2<br />
<br />
[sharkcz@guest05 lib]$ file libQt5WebEngineCore.so.5.11.2<br />
libQt5WebEngineCore.so.5.11.2: ELF 64-bit LSB shared object, 64-bit PowerPC or cisco 7500, version 1 (SYSV), dynamically linked, BuildID[sha1]=39083e3d8053ec0ffaccfee7a8634d9d6954dbde, with debug_info, not stripped, too many notes (256)<br />
</nowiki></div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Talos_II/Hardware_Compatibility_List&diff=1642Talos II/Hardware Compatibility List2018-09-20T08:50:44Z<p>Western Semiconductor: /* NVMe M.2 Adapters */</p>
<hr />
<div>This is a collection of components known to work with the [[Talos_II|Talos™ II]]-based solutions. It's maintained by both [[Raptor Computing Systems|Raptor CS]] and community members.<br />
<br />
== Cases ==<br />
<br />
=== Good Cases ===<br />
<br />
These cases were successfully used by someone.<br />
<br />
* '''SuperMicro SC732i-500B'''<br />
** Not recommended for 12 core and higher CPUs<br />
<br />
* '''SuperMicro SC732D3-903B'''<br />
** No NIC 2 LED on front panel<br />
** Needed [https://www.startech.com/Cables/Computer-Power/Internal/12in-4-Pin-Fan-Power-Extension-Cable~FAN4EXT12 four pin extension cable] for main chassis fan<br />
<br />
* '''SuperMicro SC732D4-903B'''<br />
** Add-on sound card recommended<br />
** Add-on USB 2.0 card or USB 3.0 hub recommended<br />
<br />
* '''SuperMicro SC747TQ-R1400B or SC747TG-R1400B-SQ'''<br />
** Hot swap drive capable; SAS recommended<br />
** Recommended for use with one or more high-end GPUs<br />
** Listed as EoL by Supermicro, replaced with 1620 versions. Same fan modules and PDU used in newer, higher watt, version. ([[User:Robbieab|Robbieab]] ([[User talk:Robbieab|talk]]))<br />
** [[:File:TalosII_SystemAssembly_nashimus_v3.mp4|System Assembly Video - SC747TG-R1400B-SQ]]<br />
<br />
* '''Rosewill RSV-L4500'''<br />
** Fans are two wire and use molex connectors<br />
<br />
* '''TCG TGC-H4-650'''<br />
** Physical dimensions and mounting hardware fit perfectly<br />
** Extremely Inexpensive Bare-bones 4U Chassis<br />
<br />
* '''Thermaltake Core W100''' (See the ''[https://wiki.raptorcs.com/wiki/Category:Gallery Morgan's Revenge]'', by [[User:Peter Easton|JollyRoger]])<br />
** The positions of some standoffs are under components mounted on the back of the board. Careful measurement and attachment of only the standoffs that fit prior to installation of the motherboard is ''a necessity'' to avoid damaging the motherboard upon installation.<br />
** An add-on internal USB header is necessary to activate the extra 2 USB3 ports on the front panel.<br />
** The case is very spacious, with plenty of room and lots of space for many fans. Works well to provide necessary airflow and pressure within the case. <br />
** It is extremely important to have a good quality, powerful fan capable of withstanding high temperatures is required for the rear exhaust fan, which is very close to the rear CPU exhaust. A low quality fan in the rear exhaust port may hinder cooling.<br />
<br />
=== Problematic Cases ===<br />
<br />
* '''BeQuiet Dark Base 900''' ([[User:Robbieab|Robbieab]] ([[User talk:Robbieab|talk]]))<br />
** Claims to support E-ATX on the BeQuiet website<br />
** Infographic showing the motherboard space to only be 322mm deep, which is 8.2mm short of the full-size E-ATX. <br />
** Emailed them for clarification, but no response. Can't confirm either way.<br />
<br />
* '''SuperMicro SC822'''<br />
** Low speed fans provide insufficient airflow over CPU0, leading to overheating if more than one 4-core CPU is installed.<br />
<br />
* '''Athena Power RM-3U8G1043'''<br />
** Some motherboard standoffs needed to be removed, and others needed additional hight.<br />
**There was no standoff hole for the top right. <br />
**The support beam across the top of the case interferes with CPU2 heatsink, but can be easily removed.<br />
<br />
==== Standoff Issues ====<br />
<br />
Stand off issues appear to be a very common problem. In many cases mitigation may be possible.<br />
<br />
* '''Fractal Design Define XL R2'''<br />
** Missing standoff holes for the top-left and top-middle positions.<br />
** Some alternative standoff in at least the top-middle position may be required to prevent too much bending of the motherboard while inserting RAM.<br />
<br />
* '''BitFenix Aurora'''<br />
** [[User:MarcusC/BitFenix_Aurora|Multiple missing standoff holes]], some mitigation possible.<br />
<br />
* '''Thermaltake Core W200'''<br />
** Heavy, expensive, massive.<br />
** Compatible ''with caveats''<br />
*** Talos™ II mainboard will fit in E-ATX compatible side only (when viewed from rear of case, the right side) if the dual system case.<br />
*** Missing standoff holes for the top-left and top-middle positions. (non-essential but ensure proper support when inserting and removing RAM to avoid bending mainboard)<br />
*** Must remove wire-hole rubber grommets present under Talos™ II mainboard on right lower side for proper fit<br />
<br />
* '''Nanoxia Deep Silence2''' ([[User:Sharkcz|Sharkcz]])<br />
** missing top-middle standoff hole, but I've used a plastic "flat" standoff instead<br />
** Power LED - red goes to pin 15, black to pin 16<br />
<br />
* '''RAIJINTEK ASTERION PLUS (Model 0R200049)''' ([[User:cyrozap|cyrozap]])<br />
** Missing standoff holes for the top-left and top-middle positions.<br />
*** As a workaround the standoffs can be unscrewed and placed upside-down (screw threads facing up) under the motherboard holes.<br />
*** This actually works surprisingly well, and thanks to the other screw points the motherboard is rigid enough that I don't worry too much about the weight of the HSFs flexing it.<br />
*** That said, it's probably a good idea to always transport the system on its side and avoid bumping it if possible.<br />
** The hinged panels that open with handles are much nicer than fiddling with thumb screws, but annoying since it makes it slightly trickier to do things that involve both the inside and back panel of the case (e.g., inserting PCI-e cards).<br />
** The PSU is at the very bottom of the case, while all the motherboard power connectors are at the very top of the case, so this can cause some issues if your PSU's cables aren't long enough.<br />
*** The EPS12V cables on my power supply had a few inches left over, but the main motherboard power cable was just barely able to reach from the other side of the case to the power connector.<br />
** The front of the case is sheet metal stuck to plastic using some double-sided adhesive tape, which doesn't seem to work very well.<br />
*** When I received the case the front metal was starting to peel off a few inches (several cm) at the top and bottom.<br />
*** It sticks back in place when I press on it, but I may need to get some better adhesive and re-apply it later.<br />
** For $170, I was hoping for something a little more robust, but at least it's pretty.<br />
<br />
* possible mitigation is plastic standoff like [https://www.kangyang-europe.com/product/pc-board-hardware/ass-10/ ASS-10]<br />
<br />
* '''Corsair 760T''' ([[User:mosst|mosst]])<br />
** Reasonably cheap.<br />
** Unusually tasteful aesthetics for a consumer/gaming case. Looks like something Aperture Science would come up with.<br />
** E-ATX boards fit, but the top-left and top-middle standoffs are missing, however this isn't much of a problem as the I/O panel helps hold the board in place.<br />
** Cable management may be difficult, as E-ATX boards cover most of the cable holes.<br />
<br />
=== Candidate Cases ===<br />
<br />
These cases claim E-ATX support and are planned to be used, or were considered, by someone.<br />
<br />
* '''Lian Li PC-V1000L''' ([[User:Robbieab|Robbieab]] ([[User talk:Robbieab|talk]]))<br />
** Similar price point to the Supermicros with high power PSU. <br />
** Very "Apple" brushed aluminium aesthetic. <br />
** Couldn't confirm E-ATX was fullsize.<br />
** Passed over in favour of the SuperMicro SC747TQ-R1400B<br />
<br />
<br />
== Power Supplies ==<br />
When planning to run with both CPU sockets populated keep in mind that the power-supply should support also 2 8-pin EPS connectors.<br />
<br />
* Seasonic PRIME 1300W<br />
* Seasonic PRIME Ultra 850W Gold<br />
* Seasonic PRIME Ultra 650W<br />
* Seasonic PRIME Ultra Titanium 1000W (SSR-1000TR)<br />
* FSP Group Twins ATX 1+1 Dual Module 700W 80 PLUS GOLD Hot Swappable Redundant Digital Power Supply ([[User:ebrasca|ebrasca]])<br />
** Customer reported good build quality and proper functionality<br />
* Corsair TX550M 80+ GOLD ([[User:MarcusC|MarcusC]])<br />
** 2nd EPS power cable sold separately<br />
* Corsair AX860 <br />
* EVGA SuperNova 1200P2 1200W Platinum([[User:mosst|mosst]])<br />
** Works well, but the included ATX power cables may be too short if your PSU is mounted on the bottom of the case.<br />
* SilverStone Strider gold S series 850W ATX. 80 plus gold certification. ([[User:Xilinder|Xilinder]])<br />
<br />
== Memory ==<br />
<br />
The criteria are basically "is it ECC, is it registered, is it NOT LRDIMM"<br />
<br />
From the manual:<br />
<br />
{| class="wikitable"<br />
|-<br />
|Total Slots<br />
|16 (4 channels per CPU)<br />
|-<br />
|Capacity<br />
|2TB maximum<br />
|-<br />
|Memory Type<br />
|DDR4 1600/1866/2133/2400/2666<br />
|-<br />
|Memory Features<br />
|ECC<br />
|-<br />
|Module Sizes<br />
|8GB, 16GB, 32GB, 64GB, 128GB (RDIMM)<br />
|-<br />
|}<br />
<br />
=== Tested Memory ===<br />
<br />
==== Good Memory ====<br />
<br />
{| class="wikitable sortable"<br />
!colspan="6"|Module<br />
!colspan="4"|Validation<br />
|-<br />
!Manufacturer<br />
!Model<br />
!Size<br />
!Speed<br />
!Type<br />
!ECC<br />
!Stepping<br />
!Firmware<br />
!Source<br />
!Notes<br />
|-<br />
|Pacific Sun<br />
|X10723042S<br />
|8GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.1<br />
|Hostboot cc2d45a<br />
|Official<br />
|<br />
|-<br />
|Hynix<br />
|HMA82GR7AFR8N-UH<br />
|16GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot e36ec63<br />
|Official<br />
|<br />
|-<br />
|Samsung<br />
|M393A1G40DB0-CPB<br />
|8GB<br />
|PC4-17000<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 30dfd3b<br />
|meklort<br />
|Requires [[Talos_II/Firmware|System Package v1.02]]<br />
|-<br />
|Kingston<br />
|KTH-PL424/16G<br />
|16GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.1<br />
|Hostboot cc2d45a<br />
|Official<br />
|<br />
|-<br />
|Micron<br />
|MTA18ASF2G72PZ-2G3B1<br />
|16GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 28927a7<br />
|Official<br />
|<br />
|-<br />
|Micron<br />
|MTA18ASF2G72PDZ-2G3D1<br />
|16GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.1<br />
|Hostboot cc2d45a<br />
|Official<br />
|<br />
|-<br />
|Micron<br />
|MTA18ASF2G72PDZ-2G6D1<br />
|16GB<br />
|PC4-21333<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 884b60b<br />
|[[User:Smaeul|smaeul]]<br />
|<br />
|-<br />
|Micron<br />
|MTA36ASF4G72PZ-2G6D1<br />
|32GB<br />
|PC4-21333<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 6ffaeb4<br />
|[[User:cyrozap|cyrozap]]<br />
|<br />
|-<br />
|Samsung<br />
|M393A4K40BB1-CRC<br />
|32GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.1<br />
|Hostboot 1e2221d<br />
|Official<br />
|<br />
|-<br />
|Samsung<br />
|M393A8K40B22-CWD<br />
|64GB<br />
|PC4-21300<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 884b60b<br />
|Official<br />
|<br />
|-<br />
|Samsung<br />
|M393A2K40BB2-CTD<br />
|16GB<br />
|PC4-21300<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 0c8fa110<br />
|meklort<br />
|Will run at 2400MT/s with [[Talos_II/Firmware|System Package v1.00]]<br />
|-<br />
|Samsung<br />
|M393A4K40BB2-CTD8Q<br />
|32GB<br />
|PC4-21333<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 28927a7<br />
|luke-jr<br />
|<br />
|-<br />
|Samsung<br />
|M393A2G40EB2-CTD<br />
|16GB <br />
|PC4-21300V-R<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|Hostboot 30dfd3b<br />
|JSharp<br />
|Tested extensively with [[Talos_II/Firmware|System Package v1.02]] but does boot on v1.00, Dual 8-Core POWER9, x8 DIMM Modules (RCS Recommended Slot Configuration) 128GiB total; also tested x4 DIMM Modules (RCS Recommended Slot Configuration) 64GiB total<br />
|-<br />
|Samsung<br />
|M393A4K40CB2-CTD6Q<br />
|32GB<br />
|PC4-21300<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|hostboot-884b60b<br />
|kev009<br />
|8 DIMMs working well<br />
|-<br />
|Kingston<br />
|KVR24R17S8K4/32<br />
|8GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|1.04, PNOR d286337d<br />
|sharkcz<br />
| kit 4x 8GB, got 1 stick faulty, but 3x 8GB worked OK<br />
|-<br />
|Kingston<br />
|KVR24R17D8/16MA<br />
|16GB<br />
|PC4-19200<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|1.04, PNOR d286337d<br />
|sharkcz<br />
|<br />
|-<br />
|Crucial<br />
|CT4G4RFS8266<br />
|4GB<br />
|PC4-21300<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|<br />
|[[User:Robbieab|Robbieab]]<br />
|Purchased as the CT2K4G4RFS8266 8GB kit. Confirmed functional from the petitboot shell.<br />
|-<br />
|Crucial<br />
|CT8G4RFS8266<br />
|8GB<br />
|PC4-21300<br />
|Registered<br />
|Yes<br />
|<br />
|<br />
|<br />
|CT2K8G4RFS8266 16GB kit (8GBx2). DDR4 PC4-21300 • CL=19 • Single Ranked • x8 based • Registered • ECC • DDR4-2666 • 1.2V • 1024Meg x 72. Confirmed with a working Debian GNU and Devuan GNU+Linux installation.<br />
|-<br />
|Ventura (Samsung)<br />
|D4-62JA402SV-15<br />
|16GB<br />
|PC4-17000<br />
|Registered<br />
|Yes<br />
|POWER9 DD2.2<br />
|<br />
|mosst<br />
|<br />
|}<br />
<br />
==== Incompatible Memory ====<br />
<br />
NOTE: Memory may be removed from this table after firmware support has been added, or there may be a fundamental hardware incompatibility. If you have incompatible memory listed in the table below, you may want to bookmark and check this page from time to time to see if a firmware update has resolved the issue.<br />
<br />
{| class="wikitable sortable"<br />
!colspan="6"|Module<br />
!colspan="4"|Test Conditions<br />
|-<br />
!Manufacturer<br />
!Model<br />
!Size<br />
!Speed<br />
!Type<br />
!ECC<br />
!Stepping<br />
!Firmware<br />
!Last Test<br />
|-<br />
|Samsung<br />
|M386A8K40BMB-CRC<br />
|64GB<br />
|PC4-19200<br />
|Registered LRDIMM<br />
|Yes<br />
|POWER9 DD2.1<br />
|Hostboot 1e2221d<br />
|02/14/2018<br />
|-<br />
|}<br />
<br />
== SAS/SATA Storage Drives ==<br />
<br />
Connected via optional on-board [[PM8068]] controller, or via PCIe controller. NVMe cards are also [[#NVMe Storage Drives|supported]].<br />
<br />
Boards with onboard SAS have one Mini-SAS HD 4i (SFF-8643) port, and four standard SATA-III ports. Both support both SAS and SATA at the electrical level.<br />
<br />
Note: Microsemi Adaptec Series 8 RAID controllers [http://download.adaptec.com/pdfs/readme/microsemi_series-8-controller_readme_4_2018.pdf do not support ATAPI CD-ROM, DVD, or tape devices.]<br />
<br />
== PCIe Devices ==<br />
<br />
=== Storage Controllers ===<br />
<br />
* IOCrest SI-PEX40062 (Chipset: Marvell 88SE9235)<br />
* Kouwell PE-115H (Chipset: Marvell 88SE9130, PCI id 1b4b:9130)<br />
* LSI 9300/9200 SAS HBAs<br />
** May require updating to IT firmware on a x86 machine<br />
* [[PM8068]]-based SAS HBAs <br />
* Supermicro AOC-SLG3-4E2P 4-port OCuLink adapter<br />
* Jmicron JMB 363 SATA PCIe card. SATA ports work with Petitboot.<br />
<br />
==== non working ====<br />
* AXAGON PCES-SA2 (ASMedia chipset)<br />
<br />
=== NICs ===<br />
* Broadcom [[BCM5719]]<br />
* Chelsio T6225-SO-CR<br />
<br />
=== NVMe M.2 Adapters ===<br />
* [http://ableconn.com/products_2.php?gid=62 Ableconn PEXM2-SSD M.2 NGFF PCIe SSD to PCI Express 3.0 x4 Host Adapter Card (M.2 to PCIe adapter)]<br />
* [http://www.delock.com/produkte/G_89370/merkmale.html Delock PCI Express x4 Card > 1 x internal NVMe M.2 Key M 80 mm - Low Profile Form Factor]<br />
* [https://www.newegg.com/Product/Product.aspx?Item=9SIA4RE5AU2769 JEYI SK4 M.2 NVMe(M Key) SSD to PCI-E 3.0 x4 Adapter Converter Card]<br />
* [https://www.newegg.com/Product/Product.aspx?Item=N82E16815124167 SYBA SI-PEX40110 M.2 PCI-e To PCI-e 3.0 x4]<br />
<br />
==== Non-Working ====<br />
<br />
* [https://www.amazon.com/gp/product/B074WV4ZN4 Aplicata Quad M.2 NVMe SSD PCIe x16 Adapter] -- only recognizes lowest M.2 slot (tried in all three x16 PCIe slots). POWER9 Sforza supports PCIe trifurcation but TalosII does not seem to.<br />
<br />
=== NVMe Storage Drives ===<br />
* Samsung 950 PRO (with M.2 to PCIe adapter)<br />
* Samsung 960 EVO / PRO (with M.2 to PCIe adapter)<br />
* Samsung 970 PRO (with M.2 to PCIe adapter)<br />
* Intel Optane 900P NVMe XPoint PCIe<br />
* Intel Optane 905P NVMe XPoint PCIe AIC<br />
* WD Black PCIe (with M.2 to PCIe adapter)<br />
* MyDigitalSSD BPX 480GB (with M.2 to PCIe adapter)<br />
<br />
=== Graphics Cards ===<br />
<br />
No display? Check out the [[Troubleshooting/GPU|GPU Troubleshooting]] page.<br />
<br />
==== AMD ====<br />
<br />
All AMD GPUs currently have DMA issues (limited to 32-bit, which can cause crashes) with the current Talos II firmware.<br />
This is expected to be fixed in future firmware updates.<br />
<br />
* AMD Radeon HD 5850 - Must disable onboard VGA first. Currently has issues with only using 32-bit DMA.<br />
* AMD Radeon HD 6850 - Disable AST VGA with jumper. 32 bit.<br />
* AMD Radeon HD 7850 - Disabled onboard VGA. Using amdgpu is highly unstable, radeon driver is usable but has issues with only using 32-bit DMA.<br />
* AMD Radeon HD 7950 - Must disable onboard VGA first. Currently has issues with only using 32-bit DMA.<br />
* AMD Radeon R5 220<br />
* AMD Radeon R5 230 - Works in BE mode (use <code>Option "AccelMethod" "EXA"</code> for Xorg)<br />
* AMD Radeon R7 240<br />
* Radeon R9 290X<br />
* AMD Radeon Pro WX7100 (Polaris10 core) - Available pre-installed on Talos II workstation, server, and desktop configurations.<br />
* AMD Radeon Pro WX5100<br />
* AMD Radeon Pro WX4100 (Polaris11 core) - May need at least linux 4.16 in order to get Xorg to work.<br />
* AMD RX Vega 56 - Works with Debian Buster with amdgpu. Requires patches to work, somewhat unstable but usable. Cannot use AST Integrated VGA and AMDGPU at the same time without causing conflict. Not tested at this moment for use in petitboot or firmware. <br />
<br />
The core name is important when storing the firmware into the BOOTKERNFW partition in PNOR for use by skiroot.<br />
<br />
==== NVIDIA ====<br />
* NVIDIA Corporation G96 [GeForce 9500 GT] (rev a1) - Works in petitboot if onboard VGA is disabled. Currently has issues with only using 32-bit DMA. No firmware needed.<br />
<br />
=== Sound Cards ===<br />
<br />
* Creative Sound Blaster Audigy FX SB1570 PCIe 5.1 Sound Card<br />
* Creative Sound Blaster X-Fi Xtreme Fidelity PCIe Audio Sound Card (SB0880)<br />
* AMD Radeon HD 5850 and 7950 (HDMI audio)<br />
* [http://www.vantecusa.com/products_detail.php?p_id=156&p_name=+USB+Stereo+Audio+Adapter&pc_id=9&pc_name=Adapters&pt_id=3&pt_name=Audio+%2B++Video#tab-1 VANTEC NBA-120U (USB)]<br />
* [http://mackie.com/products/onyx-blackjack Mackie Onyx Blackjack (USB) Recording Interface]<br />
* RME HDSPe AIO (FreeBSD tested)<br />
<br />
=== USB controllers ===<br />
* Insignia USB 3.0 PCI-e NS-PCCUP53 V1.0 (Chipset: NEC D720202)<br />
* AGAXO PCEU-23R (Chipset: Renesas uPD720202, PCI id 1912:0015)<br />
* Terminus Technology Inc. FE 2.1 7-port Hub<br />
<br />
==== non-working ====<br />
* AXAGON PCEU-43V - chipset Via VL805 - PCI id 1106:3483<br />
* StarTech PEXUSB314A2V - 2x ASM1142 host controllers and a PCIe switch<br />
* QNINE USB 3.1 Gen2 (Type-A and Type-C) - ASM1142<br />
** It's based on the the same reference design as all the other cheap ASM1142 cards, so there's a good chance those won't work either.<br />
* Ableconn PU31-2C-2 - ASM2142<br />
<br />
=== TV Tuners ===<br />
* Hauppauge WinTV-quadHD<br />
<br />
== CAPI Devices ==<br />
<br />
* Mellanox ConnectX-6 EN 200Gb/s Adapter Card<br />
<br />
== Serial Adapters for J7701 Header ==<br />
* [http://pinoutguide.com/Motherboard/rs232_header_pinout.shtml Pinout Details]<br />
=== DTK/INTEL (compatible) ===<br />
* CablesToGo 09480 (unverified)<br />
* [https://www.pccables.com/DB9M-TO-IDC10-SERIAL-DTK-PORT.html DB9M TO IDC10 SERIAL DTK PORT 07121]<br />
* Assmann Serial Slot Bracket AK-610300-003-E, sold under PremiumCord brand (used by [[User:Sharkcz|Sharkcz]])<br />
* E-ITX ACC3100[https://www.amazon.com/dp/B00DSTTDQW/] (tested by [[User:Bdragon|Bdragon]])<br />
<br />
=== AT/EVEREX (not compatible) ===<br />
* StarTech PLATE9M16<br />
* Gigabyte COM port<br />
* CablesToGo 27550 (labelled Intel-compatible, but does not work) [https://www.cablestogo.com/product/27550/16in-db9m-serial-rs232-add-a-port-adapter-cable-with-bracket-for-intel-motherboards]<br />
<br />
== Serial Adapters for BMC TTL Auxiliary Serial Header ==<br />
* Adafruit USB to TTL Serial Cable - Debug / Console Cable for Raspberry Pi [https://www.adafruit.com/product/954]<br />
<br />
Unfortunately the auxiliary serial port is disabled in software by default. To enable it temporarily for a given boot, interrupt U-Boot through the serial port in the prior section, and then enter the following commands at the '''ast#''' prompt:<br />
<br />
<pre><br />
setenv fit 0x20080000<br />
setenv other_rfs 0x20300000<br />
setenv uart2_fdt 0x90000000<br />
fdt addr ${fit}<br />
fdt get addr fit_fdt /images/fdt@1 data<br />
fdt move ${fit_fdt} ${uart2_fdt}<br />
fdt addr ${uart2_fdt}<br />
fdt resize<br />
setenv pin_path "/ahb/apb/syscon@1e6e2000/pinctrl@1e6e2000/"<br />
setenv phandle 80<br />
for pin in txd2 rxd2 nrts2 ndtr2 ndsr2 ncts2 ndcd2 nri2<br />
do<br />
fdt set ${pin_path}${pin}_default linux,phandle <${phandle}><br />
fdt set ${pin_path}${pin}_default phandle <${phandle}><br />
setexpr phandle ${phandle} + 1<br />
done<br />
setenv uart2_path "/ahb/apb/serial@1e78d000"<br />
fdt set ${uart2_path} status "okay"<br />
fdt set ${uart2_path} pinctrl-names "default"<br />
fdt set ${uart2_path} pinctrl-0 <0x00000050 0x00000051 0x00000052 0x00000053 0x00000054 0x00000055 0x00000056 0x00000057><br />
fdt addr ${fit}<br />
if fdt get value ramdisk_conf /configurations/conf@1 ramdisk<br />
then<br />
bootm ${fit}#conf@1 ${fit}#conf@1 ${uart2_fdt}<br />
else<br />
bootm ${fit}#conf@1 ${other_rfs} ${uart2_fdt}<br />
fi<br />
</pre><br />
<br />
After the system has booted, you can enable logins over the auxiliary serial port with:<br />
<br />
<pre><br />
systemctl start serial-getty@ttyS1.service<br />
</pre></div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=POWER9&diff=1634POWER92018-09-19T11:39:09Z<p>Western Semiconductor: </p>
<hr />
<div>{{Infobox<br />
|title = Processor Information<br />
|header1 = POWER9<br />
|label2 = [[Power ISA|Power ISA]]<br />
|data2 = 3.0B<br />
|label3 = Process node<br />
|data3 = 14nm<br />
|label4 = Maximum slices<br />
|data4 = 24<br />
|label5 = Maximum cores<br />
|data5 = 12 [[SMT8|SMT8]] / 24 [[SMT4|SMT4]]<br />
|label6 = L2 cache / slice<br />
|data6 = 512kB<br />
|label7 = L3 cache / slice<br />
|data7 = 10MB<br />
|label8 = Production availability<br />
|data8 = January 2018<br />
|label9 = Production stepping(s)<br />
|data9 = DD2.2<br />
|label10 = [[POWER8E|← POWER8E]]<br />
|data10 = POWER10 → <br />
}}<br />
<br />
POWER9 is IBM's most recent POWER compatible server and workstation CPU ([[Power ISA|POWER ISA]] v3.0B). Built on a 14nm process, each CPU package can contain up to 24 [[SMT4|SMT4]] cores or 12 [[SMT8|SMT8]] cores. Each pair of [[SMT4|SMT4]] cores, or singleton [[SMT8|SMT8]] core, comprises a slice; each slice in turn contains 512kB L2 cache and 10MB L3 cache. Raptor Computing Systems' 4- and 8-core processors provide unpaired cores, such that one [[SMT4|SMT4]] core per slice is fused off. This allows each of the [[SMT4|SMT4]] cores to utilize the full cache of the slice exclusively, increasing performance for these [[Single_Thread|ST]]-focused processors.<br />
<br />
== Chips ==<br />
<br />
{| class="wikitable"<br />
|+ POWER9 Chips<br />
! !! PowerNV !! PowerVM<br />
|-<br />
! Scale Out<br />
| Nimbus || unknown<ref group="note">The presentation by Jeff Stuecheli makes it clear that these chips will exist, but the codename for them is currently unknown.</ref><br />
|-<br />
! Scale Up<br />
| || Cumulus<br />
|}<br />
<references group="note"/><br />
<br />
[[PowerNV|PowerNV]] chips use [[SMT4|SMT4]] cores exclusively, and are intended to run Linux on bare metal as an OpenPOWER system. PowerVM chips, in contrast, use [[SMT8|SMT8]] cores, and are intended to run Linux, AIX, or IBM i under IBM's PowerVM hypervisor.<br />
<br />
Chips are planned to be made in both [[Scale Out|Scale Out]] (direct-attach RAM) and [[Scale Up|Scale Up]] (centaur-buffered RAM) configurations; where a Scale Out system can use normal RAM attached directly to the CPU, Scale Up chips require that access to RAM be through a Centaur memory buffer, which behaves like a L4 cache.<ref>Stuecheli, Jeff. POWER9. Presentation for [https://www.ibm.com/developerworks/community/wikis/home?lang=en#!/wiki/Power+Systems/page/AIX+Virtual+User+Group+-+USA AIX VUG]. ([https://public.dhe.ibm.com/systems/power/community/aix/Central-VUG-Replays/2017-01-26_IBM_POWER9.wmv video download], [https://www.ibm.com/developerworks/community/wikis/form/anonymous/api/wiki/61ad9cf2-c6a3-4d2c-b779-61ff0266d32a/page/1cb956e8-4160-4bea-a956-e51490c2b920/attachment/56cea2a9-a574-4fbb-8b2c-675432367250/media/POWER9-VUG.pdf slides], [[User:Torpcoms/Timemark/POWER9|timemarks]])</ref><br />
<br />
=== Markings ===<br />
<br />
There does not appear to be any way to distinguish a 4-core chip from an 8-core chip by looking at the markings on the top (HSF-facing) surface of the module.<br />
<br />
== Modules ==<br />
<br />
{| class="wikitable"<br />
|+ POWER9 Modules<br />
! Chip !!Module<br />
|-<br />
!rowspan="3"|Nimbus<br />
| [[Sforza|Sforza]]<br />
|-<br />
| [[Monza|Monza]]<br />
|-<br />
| [[LaGrange|LaGrange]]<br />
|-<br />
! (PowerVM<br/>Scale Out)<br />
| unknown<br />
|-<br />
! Cumulus<br />
| unknown<br />
|}<br />
<br />
=== Nimbus ===<br />
<br />
Nimbus chips are available in three different modules: Sforza, Monza, and LaGrange. Each module exposes different I/O functionality to the host platform, allowing purpose-built systems to be constructed in addition to more general-purpose computers.<br />
<br />
==== Sforza ====<br />
<br />
[[Sforza|Sforza]] is the most flexible of these packages, providing PCIe 4.0 lanes as the main I/O resource, and is what [[Talos_II|Talos™ II]] uses for maximal similarity to existing desktop, workstation, and server systems.<br />
<br />
==== Monza ====<br />
<br />
[[Monza|Monza]] modules offer the most OpenCAPI/NVLink bandwidth and are used in IBM's AC922 (Witherspoon) systems, such as those used by the Sierra and Summit supercomputers.<br />
<br />
==== LaGrange ====<br />
<br />
[[LaGrange|LaGrange]] modules offer increased XBus bandwidth between processor sockets and are used by the Google/Rackspace Zaius motherboard used in the Barreleye G2 system.<ref>Gangidi, Adi [https://blog.rackspace.com/zaius-barreleye-g2-server-development-update-2 Zaius/Barreleye G2 Server Development Update]. 2017-11-13</ref><br />
<br />
=== Cumulus ===<br />
<br />
Little is known about Cumulus chips now; as Scale Up chips, they will trade some peripherals bandwidth for communication between more than 2 sockets.<ref>Morgan, Timothy Prickett. [https://www.nextplatform.com/2017/12/05/power9-to-the-people/ POWER9 to the People]. 2017-12-05</ref><br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== Resources ==<br />
<br />
* [[:File:POWER9-Features-and-Specifications.pdf|Basic POWER9 overview presentation]]<br />
* [[:File:PowerISA_public.v3.0B.pdf|Power ISA version 3.0B]] - implemented by POWER9<br />
<br />
== External Links ==<br />
<br />
* [https://en.wikipedia.org/wiki/POWER9 POWER9 English Wikipedia page]<br />
* [https://en.wikichip.org/wiki/ibm/microarchitectures/power9 POWER9 wikichip page]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=POWER9&diff=1633POWER92018-09-19T11:31:21Z<p>Western Semiconductor: outline structure so table of contents shows "family tree"</p>
<hr />
<div>{{Infobox<br />
|title = Processor Information<br />
|header1 = POWER9<br />
|label2 = [[Power ISA|Power ISA]]<br />
|data2 = 3.0B<br />
|label3 = Process node<br />
|data3 = 14nm<br />
|label4 = Maximum slices<br />
|data4 = 24<br />
|label5 = Maximum cores<br />
|data5 = 12 [[SMT8|SMT8]] / 24 [[SMT4|SMT4]]<br />
|label6 = L2 cache / slice<br />
|data6 = 512kB<br />
|label7 = L3 cache / slice<br />
|data7 = 10MB<br />
|label8 = Production availability<br />
|data8 = January 2018<br />
|label9 = Production stepping(s)<br />
|data9 = DD2.2<br />
|label10 = [[POWER8E|← POWER8E]]<br />
|data10 = POWER10 → <br />
}}<br />
<br />
POWER9 is IBM's most recent POWER compatible server and workstation CPU ([[Power ISA|POWER ISA]] v3.0B). Built on a 14nm process, each CPU package can contain up to 24 [[SMT4|SMT4]] cores or 12 [[SMT8|SMT8]] cores. Each pair of [[SMT4|SMT4]] cores, or singleton [[SMT8|SMT8]] core, comprises a slice; each slice in turn contains 512kB L2 cache and 10MB L3 cache. Raptor Computing Systems' 4- and 8-core processors provide unpaired cores, such that one [[SMT4|SMT4]] core per slice is fused off. This allows each of the [[SMT4|SMT4]] cores to utilize the full cache of the slice exclusively, increasing performance for these [[Single_Thread|ST]]-focused processors.<br />
<br />
== Chips ==<br />
<br />
{| class="wikitable"<br />
|+ POWER9 Chips<br />
! !! PowerNV !! PowerVM<br />
|-<br />
! Scale Out<br />
| Nimbus || unknown<ref group="note">The presentation by Jeff Stuecheli makes it clear that these chips will exist, but the codename for them is currently unknown.</ref><br />
|-<br />
! Scale Up<br />
| || Cumulus<br />
|}<br />
<references group="note"/><br />
<br />
[[PowerNV|PowerNV]] chips use [[SMT4|SMT4]] cores exclusively, and are intended to run Linux on bare metal as an OpenPOWER system. PowerVM chips, in contrast, use [[SMT8|SMT8]] cores, and are intended to run Linux, AIX, or IBM i under IBM's PowerVM hypervisor.<br />
<br />
Chips are planned to be made in both [[Scale Out|Scale Out]] (direct-attach RAM) and [[Scale Up|Scale Up]] (centaur-buffered RAM) configurations; where a Scale Out system can use normal RAM attached directly to the CPU, Scale Up chips require that access to RAM be through a Centaur memory buffer, which behaves like a L4 cache.<ref>Stuecheli, Jeff. POWER9. Presentation for [https://www.ibm.com/developerworks/community/wikis/home?lang=en#!/wiki/Power+Systems/page/AIX+Virtual+User+Group+-+USA AIX VUG]. ([https://public.dhe.ibm.com/systems/power/community/aix/Central-VUG-Replays/2017-01-26_IBM_POWER9.wmv video download], [https://www.ibm.com/developerworks/community/wikis/form/anonymous/api/wiki/61ad9cf2-c6a3-4d2c-b779-61ff0266d32a/page/1cb956e8-4160-4bea-a956-e51490c2b920/attachment/56cea2a9-a574-4fbb-8b2c-675432367250/media/POWER9-VUG.pdf slides], [[User:Torpcoms/Timemark/POWER9|timemarks]])</ref><br />
<br />
== Modules ==<br />
<br />
{| class="wikitable"<br />
|+ POWER9 Modules<br />
! Chip !!Module<br />
|-<br />
!rowspan="3"|Nimbus<br />
| [[Sforza|Sforza]]<br />
|-<br />
| [[Monza|Monza]]<br />
|-<br />
| [[LaGrange|LaGrange]]<br />
|-<br />
! (PowerVM<br/>Scale Out)<br />
| unknown<br />
|-<br />
! Cumulus<br />
| unknown<br />
|}<br />
<br />
=== Nimbus ===<br />
<br />
Nimbus chips are available in three different modules: Sforza, Monza, and LaGrange. Each module exposes different I/O functionality to the host platform, allowing purpose-built systems to be constructed in addition to more general-purpose computers.<br />
<br />
==== Sforza ====<br />
<br />
[[Sforza|Sforza]] is the most flexible of these packages, providing PCIe 4.0 lanes as the main I/O resource, and is what [[Talos_II|Talos™ II]] uses for maximal similarity to existing desktop, workstation, and server systems.<br />
<br />
==== Monza ====<br />
<br />
[[Monza|Monza]] modules offer the most OpenCAPI/NVLink bandwidth and are used in IBM's AC922 (Witherspoon) systems, such as those used by the Sierra and Summit supercomputers.<br />
<br />
==== LaGrange ====<br />
<br />
[[LaGrange|LaGrange]] modules offer increased XBus bandwidth between processor sockets and are used by the Google/Rackspace Zaius motherboard used in the Barreleye G2 system.<ref>Gangidi, Adi [https://blog.rackspace.com/zaius-barreleye-g2-server-development-update-2 Zaius/Barreleye G2 Server Development Update]. 2017-11-13</ref><br />
<br />
=== Cumulus ===<br />
<br />
Little is known about Cumulus chips now; as Scale Up chips, they will trade some peripherals bandwidth for communication between more than 2 sockets.<ref>Morgan, Timothy Prickett. [https://www.nextplatform.com/2017/12/05/power9-to-the-people/ POWER9 to the People]. 2017-12-05</ref><br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== Resources ==<br />
<br />
* [[:File:POWER9-Features-and-Specifications.pdf|Basic POWER9 overview presentation]]<br />
* [[:File:PowerISA_public.v3.0B.pdf|Power ISA version 3.0B]] - implemented by POWER9<br />
<br />
== External Links ==<br />
<br />
* [https://en.wikipedia.org/wiki/POWER9 POWER9 English Wikipedia page]<br />
* [https://en.wikichip.org/wiki/ibm/microarchitectures/power9 POWER9 wikichip page]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Hostboot&diff=1632Hostboot2018-09-19T11:27:13Z<p>Western Semiconductor: </p>
<hr />
<div>{{Glossary<br />
|name=Hostboot<br />
|abbr=Hostboot<br />
|desc=Open-source boot firmware used to boot [[OpenPOWER]] systems since [[POWER8]]. It is started running by the [[SBE]] after it completes its own initialization tasks, and is the first code that executes on the main POWER cores (all earlier stages execute on [[OCC]] cores). It is responsible for memory initialization and other tasks. It finishes by chainloading [[Skiboot]].}}<br />
<br />
==References==<br />
* [https://github.com/open-power/hostboot/ Hostboot source code (upstream)]<br />
* [https://git.raptorcs.com/git/talos-hostboot/ Hostboot source code (Talos II variant)]<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Compiling_Firmware&diff=1631Compiling Firmware2018-09-19T11:10:53Z<p>Western Semiconductor: /* Try unplugging the HSF fan power during SBE update */</p>
<hr />
<div>The following steps can be used to compile and update the firmware on [[Talos_II|Talos™ II]]-based solutions. It's maintained by both [[Raptor Computing Systems|Raptor CS]] and community members.<br />
<br />
== Requirements ==<br />
* At least 25GB of free hard drive space<br />
* 16GB of free RAM<br />
<br />
=== Operating System ===<br />
The build system (op-build) has been primarily tested using Debian stretch. If you are on a different operating system such as Fedora 28, a Debian chroot should be used:<br />
<pre><br />
sudo yum install debootstrap dpkg<br />
sudo debootstrap stretch debian-chroot http://httpredir.debian.org/debian<br />
sudo mount -t proc none debian-chroot/proc/<br />
sudo mount -o bind /sys/ debian-chroot/sys/<br />
sudo mount -o bind /dev/shm/ debian-chroot/dev/shm/<br />
</pre><br />
<br />
Enter the chroot and install the needed packages:<br />
<pre><br />
sudo chroot debian-chroot/<br />
apt-get install software-properties-common locales<br />
# Packages needed for PNOR builds<br />
apt-get install cscope ctags libz-dev libexpat-dev \<br />
python texinfo \<br />
build-essential g++ git bison flex unzip \<br />
libssl-dev libxml-simple-perl libxml-sax-perl libxml2-dev libxml2-utils xsltproc \<br />
wget bc rsync<br />
# Packages needed for OpenBMC builds<br />
apt-get install git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat<br />
</pre><br />
<br />
Create a chroot user:<br />
<pre><br />
useradd -m build-user -s /bin/bash<br />
su build-user<br />
cd<br />
</pre><br />
<br />
You can now use the chroot to build the firmware.<br />
<br />
To enter the chroot in the future, you can run the following from a regular terminal:<br />
<pre><br />
sudo chroot debian-chroot/<br />
su build-user<br />
cd<br />
</pre><br />
<br />
== Building the PNOR Firmware ==<br />
=== Grabbing the sources ===<br />
[[Raptor Computing Systems|Raptor CS]] maintains a public git repository containing the complete source code for the firmware.<br />
To download the source code:<br />
<pre>git clone -b raptor-v1.05 --recursive https://scm.raptorcs.com/scm/git/talos-op-build</pre><br />
<br />
'''Note: The master branch is often in a non-functional state. The latest firmware branch (raptor-v1.05 at the time of this update) should be used instead.'''<br />
<br />
=== Building the firmware ===<br />
Before building the firmware, all needed support packages must be installed. Please see the README.md file for directions on installing the needed packages.<br />
<br />
Once the packages are installed, the firmware can be build using the following commands:<br />
<pre>cd talos-op-build<br />
. op-build-env<br />
op-build talos_defconfig<br />
op-build</pre><br />
<br />
To rebuild an individual package (such as hostboot) and recreate the pnor image, the following can be run:<br />
<pre><br />
op-build hostboot-rebuild openpower-pnor-rebuild<br />
</pre><br />
<br />
=== Updating the firmware ===<br />
Copy the firmware to the BMC<br />
<pre>scp ./output/images/talos.pnor root@<talos-openbmc>:/tmp/</pre><br />
<br />
<br />
At this point, you should connect two SSH sessions to OpenBMC.<br />
In the first session, run the following to display the console during bootup:<br />
<pre>ssh -p 2200 root@<talos-openbmc></pre><br />
The console log will be useful in debugging any issues with the firmware that could occur.<br />
<br />
In the second BMC session, ensure the system is off by running obmcutil. You should see the following:<br />
<pre>ssh root@<talos-openbmc><br />
root@talos:~# obmcutil state<br />
CurrentBMCState : xyz.openbmc_project.State.BMC.BMCState.Ready<br />
CurrentPowerState : xyz.openbmc_project.State.Chassis.PowerState.Off<br />
CurrentHostState : xyz.openbmc_project.State.Host.HostState.Off<br />
</pre><br />
The CurrentHostState must be Off before continuing with the procedure.<br />
If the CurrentHostState is not Off, please turn off the machine:<br />
<pre>obmcutil chassisoff</pre><br />
<br />
==== Testing the firmware ====<br />
In order to test the firmware, a modified mboxd[https://github.com/openbmc/mboxbridge/pull/1] binary can be used.<br />
<br />
First, mboxd must be terminated:<br />
<pre>systemctl stop mboxd</pre><br />
<br />
Next, restart mboxd with the additional -i argument:<br />
<pre>mboxd -f 64M -w 1M -i /tmp/talos.pnor</pre><br />
<br />
Finally, you can test the update pnor image by starting the machine:<br />
<pre>obmcutil poweron</pre><br />
<br />
Once you've verified that everything is working, stop the machine:<br />
<pre>obmcutil poweroff</pre><br />
'''NOTE: The system must be in the off state before proceeding. This should be verified with obmcutil state as shown earlier.'''<br />
<br />
Before continuing to flash the new pnor image, the original mboxd must be started.<br />
Ctrl^C can be used to terminate mboxd. Once done, restart it using systemctl:<br />
<pre>systemctl start mboxd</pre><br />
<br />
You can now proceed with flassing the firmware.<br />
<br />
==== Flashing the firmware ====<br />
Once off, perform the update:<br />
<pre>pflash -E -p /tmp/talos.pnor</pre><br />
<br />
Start the machine:<br />
<pre>obmcutil poweron</pre><br />
<br />
Note: the machine may reboot multiple times after the initial flash.<br />
<br />
=== Troubleshooting ===<br />
<br />
==== Always upgrade PNOR and BMC together ====<br />
<br />
Many mismatched PNOR/BMC version combinations lead to weird failures.<br />
<br />
==== Try downgrading the PNOR+BMC firmware ====<br />
<br />
Firmware package 1.04 seems the most reliable at updating the SBE SEEPROM inside the POWER9 chip package.<br />
<br />
==== Always use PROC 0 socket for SBE updates ====<br />
<br />
The BMC firmware and/or FSI driver seem to either forget to update the SBE SEEPROM in the PROC1 (secondary) socket, leading to a bootup with only PROC0 active. When you get a brand new chip you need to install it in PROC0 leaving PROC1 empty, wait for the double-reboot to update the SEEPROM, and then you can move that chip to the PROC1 socket if you like.<br />
<br />
==== Try unplugging the HSF fan power during SBE update ====<br />
<br />
Not kidding about this. The BMC is insanely complicated -- it's got an entire operating system in there for some reason. It even has systemd. The BMC's systemd often gets into a funky loop restarting Hwmon over and over and over, interrupting the SBE SEEPROM reflash every time it does this. Unplugging the PROC0 HSF 4-pin connector gets it to fail hard (due to inability to read the tachometer) and stay failed so the SBE update can proceed. Ugly as this is, it's easier than trying to figure out what systemd thinks it's doing.<br />
<br />
==== SBE_MASTER_VERSION_DOWNLEVEL ====<br />
If you see the following message reported in the console, then the SBE update process did not work as expected:<br />
<pre> 16.74709|Error reported by sbe (0x2200) PLID 0x90000008<br />
16.74823| SBE Image Version Miscompare with Master Target<br />
16.74824| ModuleId 0x0d SBE_MASTER_VERSION_COMPARE<br />
16.74825| ReasonCode 0x2215 SBE_MASTER_VERSION_DOWNLEVEL<br />
16.74826| UserData1 Master Target HUID : 0x0000000000050000<br />
16.74826| UserData2 Master Target Loop Index : 0x0000000000000000</pre><br />
<br />
The machine needs to be reset to finish the update proceedure using the following:<br />
<pre>obmcutil chassisoff<br />
systemctl stop xyz.openbmc_project.State.Host.service<br />
systemctl start xyz.openbmc_project.State.Host.service<br />
obmcutil poweron</pre><br />
The update should now complete as expected.<br />
<br />
A bug report is open[https://github.com/open-power/sbe/issues/7] to track this issue.<br />
<br />
==== internal compiler error: Killed ====<br />
Building the hostboot source code requires a large amount of ram. If your machine runs out, you may see an error similar ot the following:<br />
<pre>powerpc64le-buildroot-linux-gnu-g++.br_real: internal compiler error: Killed (program cc1plus)</pre><br />
To continue you have a few options:<br />
* Reduce the number of parallel jobs being run by appending -j<num> to you build command line<br />
<pre>op-build -j4</pre><br />
* Increase the swap space<br />
* Install additional RAM<br />
<br />
== Building the OpenBMC firmware ==<br />
=== Grabbing the sources ===<br />
[[Raptor Computing Systems|Raptor CS]] maintains a public git repository containing the complete source code for the firmware.<br />
To download the source code and check out the tag:<br />
<br />
git clone https://git.raptorcs.com/git/talos-openbmc<br />
cd talos-openbmc<br />
git checkout raptor-v{{CURRENT_BMC_VERSION}}<br />
<br />
=== Building the firmware ===<br />
Before building the firmware, all needed support packages must be installed. Please see the README.md file for directions on installing the needed packages.<br />
<br />
Once the packages are installed, the firmware can be build using the following commands:<br />
<pre>cd talos-openbmc<br />
export TEMPLATECONF=meta-openbmc-machines/meta-openpower/meta-rcs/meta-talos/conf<br />
. openbmc-env<br />
bitbake obmc-phosphor-image<br />
</pre><br />
<br />
The resulting firmware can be found in the tmp/deploy/images/talos/ directory.<br />
<br />
If <b>mboxd</b> fails to build, you may need to [https://github.com/openbmc/openbmc/issues/2780 patch mboxd.bb].<br />
<br />
=== Updating the firmware ===<br />
Once firmware has been built, the resulting kernel and rofs binaries need to be copied over to the /run/initramfs/<br />
<pre><br />
scp tmp/deploy/images/talos/image-rofs tmp/deploy/images/talos/image-kernel root@<talos-openbmc>:/run/initramfs/<br />
</pre><br />
<br />
Once the images have been transferred, reboot the BMC:<br />
<pre>root@<talos-openbmc> reboot</pre><br />
<br />
OpenBMC may take a while to reboot. Once complete, you will be able to log back in via ssh.<br />
<br />
=== BMC Recovery procedure via U-Boot ===<br />
{{:Talos_II/U-Boot_Recovery}}<br />
<br />
=== Troubleshooting ===<br />
TODO</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Updating_Firmware&diff=1630Updating Firmware2018-09-19T11:09:33Z<p>Western Semiconductor: /* Troubleshooting */</p>
<hr />
<div>= Firmware Upgrade Quick-Start =<br />
<br />
Your Raptor Computing Systems POWER9 mainboard contains three primary firmware components -- a system control FPGA bitstream, the BMC software stack, and the host PNOR. The BMC and host PNOR are easily upgradeable over a network connection.<br />
<br />
In contrast, the FPGA is rarely changed. Should an FPGA upgrade be desired, a direct SPI programming connection to a Flashrom compatible system is required via the provided FPGA programming header.<br />
<br />
A list of current firmware versions for each supported product is available on the pages shown below:<br />
<br />
* [[Talos_II/Firmware|Talos II]]<br />
<br />
While we strongly encourage you to compile your own firmware components from the provided source, we also provide prebuilt firmware images for download. Please note that, in general, the only way to guarantee that you or your organization's security requirements are met is to download and audit the provided source code, then compile from that audited codebase. This is not unique to our systems; the nature of all software is that the binary form may be very difficult to analyze for undesired or unintended operation.<br />
<br />
== BMC ==<br />
'''NOTE:''' The BMC should never need to be fully reprogrammed. Erasing the entire BMC Flash device will also erase U-Boot and its associated environment variables, requiring that they be reloaded from information printed on the mainboard itself. In particular, from the factory, the IPMI MAC address is stored in both the U-Boot loader via the default environment variable string, and the currently active U-Boot environment variables. This IPMI MAC address may also be found on the mainboard below CPU0 should you need to reprogram it for any reason.<br />
<br />
The preferred method of BMC update is to take the BMC update files that you have either compiled or obtained from official Raptor Computing Systems sources, and to upload them to the BMC. Once uploaded, the BMC is able to self-update.<br />
<br />
This procedure can be done with the host powered on, but it might result in artifacts such as power button starting to blink until host is rebooted.<br />
<br />
Upgrade by transferring the following two files to /run/initramfs/ on the BMC:<br />
<br />
* image-kernel<br />
* image-rofs<br />
<br />
After transfer, reboot the BMC via the 'reboot' command over SSH or the local BMC serial console.<br />
<br />
Default BMC login information is contained in the [[:File:T2P9D01 users guide version 1 0.pdf|User's Guide]]. scp or any similar utility is capable of transferring the upgrade files.<br />
<br />
To avoid running out of disk space by placing these files in temporary directories, you can transfer them directly into /run/initramfs/ with something like `scp image-{kernel,rofs} root@169.254.200.121:/run/initramfs/`.<br />
<br />
== Host PNOR ==<br />
The host PNOR device, which contains hostboot, skiboot, and other host-level firmware components required to [[IPL|IPL]] your POWER9 system, is able to be modified in its entirety via the BMC.<br />
<br />
With chassis power off, but standby power on, transfer the upgrade .pnor file to the BMC's /tmp/ directory. Once the transfer is complete, log in to the BMC via SSH.<br />
<br />
Execute the following command:<br />
pflash -E -p /tmp/<your PNOR file><br />
<br />
For all currently released system package versions, also execute the following command:<br />
pflash -P CVPD -c<br />
<br />
If no errors occur with either command, the upgrade is complete. You may now power on and use your updated system.<br />
<br />
The host may power itself off and back on 2 times before booting into the OS.<br />
<br />
== FPGA ==<br />
Referencing the schematics provided on the included DVD, carefully connect your SPI programmer to the FPGA programming header. Apply standby power to your system but do not turn it on.<br />
<br />
Using a current version of [https://www.flashrom.org/Flashrom Flashrom] with the [https://github.com/flashrom/flashrom/commit/0b59b0dafc219ba73ee2af5404ce626575d74c6f upstream] Atmel enablement patch applied, flash the new FPGA firmware binary to the on-board storage device. Complete the upgrade by removing all power.<br />
<br />
Wait for all LEDs on your system to extinguish, then reapply power. The upgrade is now complete and and you may use your system normally.<br />
<br />
== Troubleshooting ==<br />
<br />
Some hints for resolving firmware-related problems can be found [[Talos_II/Compiling_Firmware#Troubleshooting|here]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Updating_Firmware&diff=1629Updating Firmware2018-09-19T11:09:08Z<p>Western Semiconductor: /* Troubleshooting */</p>
<hr />
<div>= Firmware Upgrade Quick-Start =<br />
<br />
Your Raptor Computing Systems POWER9 mainboard contains three primary firmware components -- a system control FPGA bitstream, the BMC software stack, and the host PNOR. The BMC and host PNOR are easily upgradeable over a network connection.<br />
<br />
In contrast, the FPGA is rarely changed. Should an FPGA upgrade be desired, a direct SPI programming connection to a Flashrom compatible system is required via the provided FPGA programming header.<br />
<br />
A list of current firmware versions for each supported product is available on the pages shown below:<br />
<br />
* [[Talos_II/Firmware|Talos II]]<br />
<br />
While we strongly encourage you to compile your own firmware components from the provided source, we also provide prebuilt firmware images for download. Please note that, in general, the only way to guarantee that you or your organization's security requirements are met is to download and audit the provided source code, then compile from that audited codebase. This is not unique to our systems; the nature of all software is that the binary form may be very difficult to analyze for undesired or unintended operation.<br />
<br />
== BMC ==<br />
'''NOTE:''' The BMC should never need to be fully reprogrammed. Erasing the entire BMC Flash device will also erase U-Boot and its associated environment variables, requiring that they be reloaded from information printed on the mainboard itself. In particular, from the factory, the IPMI MAC address is stored in both the U-Boot loader via the default environment variable string, and the currently active U-Boot environment variables. This IPMI MAC address may also be found on the mainboard below CPU0 should you need to reprogram it for any reason.<br />
<br />
The preferred method of BMC update is to take the BMC update files that you have either compiled or obtained from official Raptor Computing Systems sources, and to upload them to the BMC. Once uploaded, the BMC is able to self-update.<br />
<br />
This procedure can be done with the host powered on, but it might result in artifacts such as power button starting to blink until host is rebooted.<br />
<br />
Upgrade by transferring the following two files to /run/initramfs/ on the BMC:<br />
<br />
* image-kernel<br />
* image-rofs<br />
<br />
After transfer, reboot the BMC via the 'reboot' command over SSH or the local BMC serial console.<br />
<br />
Default BMC login information is contained in the [[:File:T2P9D01 users guide version 1 0.pdf|User's Guide]]. scp or any similar utility is capable of transferring the upgrade files.<br />
<br />
To avoid running out of disk space by placing these files in temporary directories, you can transfer them directly into /run/initramfs/ with something like `scp image-{kernel,rofs} root@169.254.200.121:/run/initramfs/`.<br />
<br />
== Host PNOR ==<br />
The host PNOR device, which contains hostboot, skiboot, and other host-level firmware components required to [[IPL|IPL]] your POWER9 system, is able to be modified in its entirety via the BMC.<br />
<br />
With chassis power off, but standby power on, transfer the upgrade .pnor file to the BMC's /tmp/ directory. Once the transfer is complete, log in to the BMC via SSH.<br />
<br />
Execute the following command:<br />
pflash -E -p /tmp/<your PNOR file><br />
<br />
For all currently released system package versions, also execute the following command:<br />
pflash -P CVPD -c<br />
<br />
If no errors occur with either command, the upgrade is complete. You may now power on and use your updated system.<br />
<br />
The host may power itself off and back on 2 times before booting into the OS.<br />
<br />
== FPGA ==<br />
Referencing the schematics provided on the included DVD, carefully connect your SPI programmer to the FPGA programming header. Apply standby power to your system but do not turn it on.<br />
<br />
Using a current version of [https://www.flashrom.org/Flashrom Flashrom] with the [https://github.com/flashrom/flashrom/commit/0b59b0dafc219ba73ee2af5404ce626575d74c6f upstream] Atmel enablement patch applied, flash the new FPGA firmware binary to the on-board storage device. Complete the upgrade by removing all power.<br />
<br />
Wait for all LEDs on your system to extinguish, then reapply power. The upgrade is now complete and and you may use your system normally.<br />
<br />
== Troubleshooting ==<br />
<br />
Some hints for resolving firmware-related problems can be found [[Compiling_Firmware/Troubleshooting|here]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Updating_Firmware&diff=1628Updating Firmware2018-09-19T11:08:49Z<p>Western Semiconductor: </p>
<hr />
<div>= Firmware Upgrade Quick-Start =<br />
<br />
Your Raptor Computing Systems POWER9 mainboard contains three primary firmware components -- a system control FPGA bitstream, the BMC software stack, and the host PNOR. The BMC and host PNOR are easily upgradeable over a network connection.<br />
<br />
In contrast, the FPGA is rarely changed. Should an FPGA upgrade be desired, a direct SPI programming connection to a Flashrom compatible system is required via the provided FPGA programming header.<br />
<br />
A list of current firmware versions for each supported product is available on the pages shown below:<br />
<br />
* [[Talos_II/Firmware|Talos II]]<br />
<br />
While we strongly encourage you to compile your own firmware components from the provided source, we also provide prebuilt firmware images for download. Please note that, in general, the only way to guarantee that you or your organization's security requirements are met is to download and audit the provided source code, then compile from that audited codebase. This is not unique to our systems; the nature of all software is that the binary form may be very difficult to analyze for undesired or unintended operation.<br />
<br />
== BMC ==<br />
'''NOTE:''' The BMC should never need to be fully reprogrammed. Erasing the entire BMC Flash device will also erase U-Boot and its associated environment variables, requiring that they be reloaded from information printed on the mainboard itself. In particular, from the factory, the IPMI MAC address is stored in both the U-Boot loader via the default environment variable string, and the currently active U-Boot environment variables. This IPMI MAC address may also be found on the mainboard below CPU0 should you need to reprogram it for any reason.<br />
<br />
The preferred method of BMC update is to take the BMC update files that you have either compiled or obtained from official Raptor Computing Systems sources, and to upload them to the BMC. Once uploaded, the BMC is able to self-update.<br />
<br />
This procedure can be done with the host powered on, but it might result in artifacts such as power button starting to blink until host is rebooted.<br />
<br />
Upgrade by transferring the following two files to /run/initramfs/ on the BMC:<br />
<br />
* image-kernel<br />
* image-rofs<br />
<br />
After transfer, reboot the BMC via the 'reboot' command over SSH or the local BMC serial console.<br />
<br />
Default BMC login information is contained in the [[:File:T2P9D01 users guide version 1 0.pdf|User's Guide]]. scp or any similar utility is capable of transferring the upgrade files.<br />
<br />
To avoid running out of disk space by placing these files in temporary directories, you can transfer them directly into /run/initramfs/ with something like `scp image-{kernel,rofs} root@169.254.200.121:/run/initramfs/`.<br />
<br />
== Host PNOR ==<br />
The host PNOR device, which contains hostboot, skiboot, and other host-level firmware components required to [[IPL|IPL]] your POWER9 system, is able to be modified in its entirety via the BMC.<br />
<br />
With chassis power off, but standby power on, transfer the upgrade .pnor file to the BMC's /tmp/ directory. Once the transfer is complete, log in to the BMC via SSH.<br />
<br />
Execute the following command:<br />
pflash -E -p /tmp/<your PNOR file><br />
<br />
For all currently released system package versions, also execute the following command:<br />
pflash -P CVPD -c<br />
<br />
If no errors occur with either command, the upgrade is complete. You may now power on and use your updated system.<br />
<br />
The host may power itself off and back on 2 times before booting into the OS.<br />
<br />
== FPGA ==<br />
Referencing the schematics provided on the included DVD, carefully connect your SPI programmer to the FPGA programming header. Apply standby power to your system but do not turn it on.<br />
<br />
Using a current version of [https://www.flashrom.org/Flashrom Flashrom] with the [https://github.com/flashrom/flashrom/commit/0b59b0dafc219ba73ee2af5404ce626575d74c6f upstream] Atmel enablement patch applied, flash the new FPGA firmware binary to the on-board storage device. Complete the upgrade by removing all power.<br />
<br />
Wait for all LEDs on your system to extinguish, then reapply power. The upgrade is now complete and and you may use your system normally.<br />
<br />
== Troubleshooting ==<br />
<br />
Some hints for resolving firmware-related problems can be found [[Compiling_Firmware#Troubleshooting|here]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Updating_Firmware&diff=1627Updating Firmware2018-09-19T11:08:35Z<p>Western Semiconductor: </p>
<hr />
<div>= Firmware Upgrade Quick-Start =<br />
<br />
Your Raptor Computing Systems POWER9 mainboard contains three primary firmware components -- a system control FPGA bitstream, the BMC software stack, and the host PNOR. The BMC and host PNOR are easily upgradeable over a network connection.<br />
<br />
In contrast, the FPGA is rarely changed. Should an FPGA upgrade be desired, a direct SPI programming connection to a Flashrom compatible system is required via the provided FPGA programming header.<br />
<br />
A list of current firmware versions for each supported product is available on the pages shown below:<br />
<br />
* [[Talos_II/Firmware|Talos II]]<br />
<br />
While we strongly encourage you to compile your own firmware components from the provided source, we also provide prebuilt firmware images for download. Please note that, in general, the only way to guarantee that you or your organization's security requirements are met is to download and audit the provided source code, then compile from that audited codebase. This is not unique to our systems; the nature of all software is that the binary form may be very difficult to analyze for undesired or unintended operation.<br />
<br />
== BMC ==<br />
'''NOTE:''' The BMC should never need to be fully reprogrammed. Erasing the entire BMC Flash device will also erase U-Boot and its associated environment variables, requiring that they be reloaded from information printed on the mainboard itself. In particular, from the factory, the IPMI MAC address is stored in both the U-Boot loader via the default environment variable string, and the currently active U-Boot environment variables. This IPMI MAC address may also be found on the mainboard below CPU0 should you need to reprogram it for any reason.<br />
<br />
The preferred method of BMC update is to take the BMC update files that you have either compiled or obtained from official Raptor Computing Systems sources, and to upload them to the BMC. Once uploaded, the BMC is able to self-update.<br />
<br />
This procedure can be done with the host powered on, but it might result in artifacts such as power button starting to blink until host is rebooted.<br />
<br />
Upgrade by transferring the following two files to /run/initramfs/ on the BMC:<br />
<br />
* image-kernel<br />
* image-rofs<br />
<br />
After transfer, reboot the BMC via the 'reboot' command over SSH or the local BMC serial console.<br />
<br />
Default BMC login information is contained in the [[:File:T2P9D01 users guide version 1 0.pdf|User's Guide]]. scp or any similar utility is capable of transferring the upgrade files.<br />
<br />
To avoid running out of disk space by placing these files in temporary directories, you can transfer them directly into /run/initramfs/ with something like `scp image-{kernel,rofs} root@169.254.200.121:/run/initramfs/`.<br />
<br />
== Host PNOR ==<br />
The host PNOR device, which contains hostboot, skiboot, and other host-level firmware components required to [[IPL|IPL]] your POWER9 system, is able to be modified in its entirety via the BMC.<br />
<br />
With chassis power off, but standby power on, transfer the upgrade .pnor file to the BMC's /tmp/ directory. Once the transfer is complete, log in to the BMC via SSH.<br />
<br />
Execute the following command:<br />
pflash -E -p /tmp/<your PNOR file><br />
<br />
For all currently released system package versions, also execute the following command:<br />
pflash -P CVPD -c<br />
<br />
If no errors occur with either command, the upgrade is complete. You may now power on and use your updated system.<br />
<br />
The host may power itself off and back on 2 times before booting into the OS.<br />
<br />
== FPGA ==<br />
Referencing the schematics provided on the included DVD, carefully connect your SPI programmer to the FPGA programming header. Apply standby power to your system but do not turn it on.<br />
<br />
Using a current version of [https://www.flashrom.org/Flashrom Flashrom] with the [https://github.com/flashrom/flashrom/commit/0b59b0dafc219ba73ee2af5404ce626575d74c6f upstream] Atmel enablement patch applied, flash the new FPGA firmware binary to the on-board storage device. Complete the upgrade by removing all power.<br />
<br />
Wait for all LEDs on your system to extinguish, then reapply power. The upgrade is now complete and and you may use your system normally.<br />
<br />
== Troubleshooting ==<br />
<br />
Some hints for resolving firmware-related problems can be found [[here Compiling_Firmware#Troubleshooting]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Updating_Firmware&diff=1626Updating Firmware2018-09-19T11:08:20Z<p>Western Semiconductor: </p>
<hr />
<div>= Firmware Upgrade Quick-Start =<br />
<br />
Your Raptor Computing Systems POWER9 mainboard contains three primary firmware components -- a system control FPGA bitstream, the BMC software stack, and the host PNOR. The BMC and host PNOR are easily upgradeable over a network connection.<br />
<br />
In contrast, the FPGA is rarely changed. Should an FPGA upgrade be desired, a direct SPI programming connection to a Flashrom compatible system is required via the provided FPGA programming header.<br />
<br />
A list of current firmware versions for each supported product is available on the pages shown below:<br />
<br />
* [[Talos_II/Firmware|Talos II]]<br />
<br />
While we strongly encourage you to compile your own firmware components from the provided source, we also provide prebuilt firmware images for download. Please note that, in general, the only way to guarantee that you or your organization's security requirements are met is to download and audit the provided source code, then compile from that audited codebase. This is not unique to our systems; the nature of all software is that the binary form may be very difficult to analyze for undesired or unintended operation.<br />
<br />
== BMC ==<br />
'''NOTE:''' The BMC should never need to be fully reprogrammed. Erasing the entire BMC Flash device will also erase U-Boot and its associated environment variables, requiring that they be reloaded from information printed on the mainboard itself. In particular, from the factory, the IPMI MAC address is stored in both the U-Boot loader via the default environment variable string, and the currently active U-Boot environment variables. This IPMI MAC address may also be found on the mainboard below CPU0 should you need to reprogram it for any reason.<br />
<br />
The preferred method of BMC update is to take the BMC update files that you have either compiled or obtained from official Raptor Computing Systems sources, and to upload them to the BMC. Once uploaded, the BMC is able to self-update.<br />
<br />
This procedure can be done with the host powered on, but it might result in artifacts such as power button starting to blink until host is rebooted.<br />
<br />
Upgrade by transferring the following two files to /run/initramfs/ on the BMC:<br />
<br />
* image-kernel<br />
* image-rofs<br />
<br />
After transfer, reboot the BMC via the 'reboot' command over SSH or the local BMC serial console.<br />
<br />
Default BMC login information is contained in the [[:File:T2P9D01 users guide version 1 0.pdf|User's Guide]]. scp or any similar utility is capable of transferring the upgrade files.<br />
<br />
To avoid running out of disk space by placing these files in temporary directories, you can transfer them directly into /run/initramfs/ with something like `scp image-{kernel,rofs} root@169.254.200.121:/run/initramfs/`.<br />
<br />
== Host PNOR ==<br />
The host PNOR device, which contains hostboot, skiboot, and other host-level firmware components required to [[IPL|IPL]] your POWER9 system, is able to be modified in its entirety via the BMC.<br />
<br />
With chassis power off, but standby power on, transfer the upgrade .pnor file to the BMC's /tmp/ directory. Once the transfer is complete, log in to the BMC via SSH.<br />
<br />
Execute the following command:<br />
pflash -E -p /tmp/<your PNOR file><br />
<br />
For all currently released system package versions, also execute the following command:<br />
pflash -P CVPD -c<br />
<br />
If no errors occur with either command, the upgrade is complete. You may now power on and use your updated system.<br />
<br />
The host may power itself off and back on 2 times before booting into the OS.<br />
<br />
== FPGA ==<br />
Referencing the schematics provided on the included DVD, carefully connect your SPI programmer to the FPGA programming header. Apply standby power to your system but do not turn it on.<br />
<br />
Using a current version of [https://www.flashrom.org/Flashrom Flashrom] with the [https://github.com/flashrom/flashrom/commit/0b59b0dafc219ba73ee2af5404ce626575d74c6f upstream] Atmel enablement patch applied, flash the new FPGA firmware binary to the on-board storage device. Complete the upgrade by removing all power.<br />
<br />
Wait for all LEDs on your system to extinguish, then reapply power. The upgrade is now complete and and you may use your system normally.<br />
<br />
== Troubleshooting ==<br />
<br />
Some hints for resolving firmware-related problems can be found [here https://wiki.raptorcs.com/wiki/Talos_II/Compiling_Firmware#Troubleshooting]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=Compiling_Firmware&diff=1625Compiling Firmware2018-09-19T11:06:04Z<p>Western Semiconductor: add four suggestions that I had to learn the hard way, to save others the agony</p>
<hr />
<div>The following steps can be used to compile and update the firmware on [[Talos_II|Talos™ II]]-based solutions. It's maintained by both [[Raptor Computing Systems|Raptor CS]] and community members.<br />
<br />
== Requirements ==<br />
* At least 25GB of free hard drive space<br />
* 16GB of free RAM<br />
<br />
=== Operating System ===<br />
The build system (op-build) has been primarily tested using Debian stretch. If you are on a different operating system such as Fedora 28, a Debian chroot should be used:<br />
<pre><br />
sudo yum install debootstrap dpkg<br />
sudo debootstrap stretch debian-chroot http://httpredir.debian.org/debian<br />
sudo mount -t proc none debian-chroot/proc/<br />
sudo mount -o bind /sys/ debian-chroot/sys/<br />
sudo mount -o bind /dev/shm/ debian-chroot/dev/shm/<br />
</pre><br />
<br />
Enter the chroot and install the needed packages:<br />
<pre><br />
sudo chroot debian-chroot/<br />
apt-get install software-properties-common locales<br />
# Packages needed for PNOR builds<br />
apt-get install cscope ctags libz-dev libexpat-dev \<br />
python texinfo \<br />
build-essential g++ git bison flex unzip \<br />
libssl-dev libxml-simple-perl libxml-sax-perl libxml2-dev libxml2-utils xsltproc \<br />
wget bc rsync<br />
# Packages needed for OpenBMC builds<br />
apt-get install git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat<br />
</pre><br />
<br />
Create a chroot user:<br />
<pre><br />
useradd -m build-user -s /bin/bash<br />
su build-user<br />
cd<br />
</pre><br />
<br />
You can now use the chroot to build the firmware.<br />
<br />
To enter the chroot in the future, you can run the following from a regular terminal:<br />
<pre><br />
sudo chroot debian-chroot/<br />
su build-user<br />
cd<br />
</pre><br />
<br />
== Building the PNOR Firmware ==<br />
=== Grabbing the sources ===<br />
[[Raptor Computing Systems|Raptor CS]] maintains a public git repository containing the complete source code for the firmware.<br />
To download the source code:<br />
<pre>git clone -b raptor-v1.05 --recursive https://scm.raptorcs.com/scm/git/talos-op-build</pre><br />
<br />
'''Note: The master branch is often in a non-functional state. The latest firmware branch (raptor-v1.05 at the time of this update) should be used instead.'''<br />
<br />
=== Building the firmware ===<br />
Before building the firmware, all needed support packages must be installed. Please see the README.md file for directions on installing the needed packages.<br />
<br />
Once the packages are installed, the firmware can be build using the following commands:<br />
<pre>cd talos-op-build<br />
. op-build-env<br />
op-build talos_defconfig<br />
op-build</pre><br />
<br />
To rebuild an individual package (such as hostboot) and recreate the pnor image, the following can be run:<br />
<pre><br />
op-build hostboot-rebuild openpower-pnor-rebuild<br />
</pre><br />
<br />
=== Updating the firmware ===<br />
Copy the firmware to the BMC<br />
<pre>scp ./output/images/talos.pnor root@<talos-openbmc>:/tmp/</pre><br />
<br />
<br />
At this point, you should connect two SSH sessions to OpenBMC.<br />
In the first session, run the following to display the console during bootup:<br />
<pre>ssh -p 2200 root@<talos-openbmc></pre><br />
The console log will be useful in debugging any issues with the firmware that could occur.<br />
<br />
In the second BMC session, ensure the system is off by running obmcutil. You should see the following:<br />
<pre>ssh root@<talos-openbmc><br />
root@talos:~# obmcutil state<br />
CurrentBMCState : xyz.openbmc_project.State.BMC.BMCState.Ready<br />
CurrentPowerState : xyz.openbmc_project.State.Chassis.PowerState.Off<br />
CurrentHostState : xyz.openbmc_project.State.Host.HostState.Off<br />
</pre><br />
The CurrentHostState must be Off before continuing with the procedure.<br />
If the CurrentHostState is not Off, please turn off the machine:<br />
<pre>obmcutil chassisoff</pre><br />
<br />
==== Testing the firmware ====<br />
In order to test the firmware, a modified mboxd[https://github.com/openbmc/mboxbridge/pull/1] binary can be used.<br />
<br />
First, mboxd must be terminated:<br />
<pre>systemctl stop mboxd</pre><br />
<br />
Next, restart mboxd with the additional -i argument:<br />
<pre>mboxd -f 64M -w 1M -i /tmp/talos.pnor</pre><br />
<br />
Finally, you can test the update pnor image by starting the machine:<br />
<pre>obmcutil poweron</pre><br />
<br />
Once you've verified that everything is working, stop the machine:<br />
<pre>obmcutil poweroff</pre><br />
'''NOTE: The system must be in the off state before proceeding. This should be verified with obmcutil state as shown earlier.'''<br />
<br />
Before continuing to flash the new pnor image, the original mboxd must be started.<br />
Ctrl^C can be used to terminate mboxd. Once done, restart it using systemctl:<br />
<pre>systemctl start mboxd</pre><br />
<br />
You can now proceed with flassing the firmware.<br />
<br />
==== Flashing the firmware ====<br />
Once off, perform the update:<br />
<pre>pflash -E -p /tmp/talos.pnor</pre><br />
<br />
Start the machine:<br />
<pre>obmcutil poweron</pre><br />
<br />
Note: the machine may reboot multiple times after the initial flash.<br />
<br />
=== Troubleshooting ===<br />
<br />
==== Always upgrade PNOR and BMC together ====<br />
<br />
Many mismatched PNOR/BMC version combinations lead to weird failures.<br />
<br />
==== Try downgrading the PNOR+BMC firmware ====<br />
<br />
Firmware package 1.04 seems the most reliable at updating the SBE SEEPROM inside the POWER9 chip package.<br />
<br />
==== Always use PROC 0 socket for SBE updates ====<br />
<br />
The BMC firmware and/or FSI driver seem to either forget to update the SBE SEEPROM in the PROC1 (secondary) socket, leading to a bootup with only PROC0 active. When you get a brand new chip you need to install it in PROC0 leaving PROC1 empty, wait for the double-reboot to update the SEEPROM, and then you can move that chip to the PROC1 socket if you like.<br />
<br />
==== Try unplugging the HSF fan power during SBE update ====<br />
<br />
Not kidding about this. The BMC is insanely complicated -- it's got an entire operating system in there for some reason. It even has systemd. The BMC's systemd often gets into a funky loop restarting Hwmon over and over and over, interrupting the SBE SEEPROM reflash every time it does this. Unplugging the PROC0 HSF 4-pin connector gets it to fail hard and stay failed so the SBE update can proceed. Ugly as this is, it's easier than trying to figure out what systemd thinks it's doing.<br />
<br />
==== SBE_MASTER_VERSION_DOWNLEVEL ====<br />
If you see the following message reported in the console, then the SBE update process did not work as expected:<br />
<pre> 16.74709|Error reported by sbe (0x2200) PLID 0x90000008<br />
16.74823| SBE Image Version Miscompare with Master Target<br />
16.74824| ModuleId 0x0d SBE_MASTER_VERSION_COMPARE<br />
16.74825| ReasonCode 0x2215 SBE_MASTER_VERSION_DOWNLEVEL<br />
16.74826| UserData1 Master Target HUID : 0x0000000000050000<br />
16.74826| UserData2 Master Target Loop Index : 0x0000000000000000</pre><br />
<br />
The machine needs to be reset to finish the update proceedure using the following:<br />
<pre>obmcutil chassisoff<br />
systemctl stop xyz.openbmc_project.State.Host.service<br />
systemctl start xyz.openbmc_project.State.Host.service<br />
obmcutil poweron</pre><br />
The update should now complete as expected.<br />
<br />
A bug report is open[https://github.com/open-power/sbe/issues/7] to track this issue.<br />
<br />
==== internal compiler error: Killed ====<br />
Building the hostboot source code requires a large amount of ram. If your machine runs out, you may see an error similar ot the following:<br />
<pre>powerpc64le-buildroot-linux-gnu-g++.br_real: internal compiler error: Killed (program cc1plus)</pre><br />
To continue you have a few options:<br />
* Reduce the number of parallel jobs being run by appending -j<num> to you build command line<br />
<pre>op-build -j4</pre><br />
* Increase the swap space<br />
* Install additional RAM<br />
<br />
== Building the OpenBMC firmware ==<br />
=== Grabbing the sources ===<br />
[[Raptor Computing Systems|Raptor CS]] maintains a public git repository containing the complete source code for the firmware.<br />
To download the source code and check out the tag:<br />
<br />
git clone https://git.raptorcs.com/git/talos-openbmc<br />
cd talos-openbmc<br />
git checkout raptor-v{{CURRENT_BMC_VERSION}}<br />
<br />
=== Building the firmware ===<br />
Before building the firmware, all needed support packages must be installed. Please see the README.md file for directions on installing the needed packages.<br />
<br />
Once the packages are installed, the firmware can be build using the following commands:<br />
<pre>cd talos-openbmc<br />
export TEMPLATECONF=meta-openbmc-machines/meta-openpower/meta-rcs/meta-talos/conf<br />
. openbmc-env<br />
bitbake obmc-phosphor-image<br />
</pre><br />
<br />
The resulting firmware can be found in the tmp/deploy/images/talos/ directory.<br />
<br />
If <b>mboxd</b> fails to build, you may need to [https://github.com/openbmc/openbmc/issues/2780 patch mboxd.bb].<br />
<br />
=== Updating the firmware ===<br />
Once firmware has been built, the resulting kernel and rofs binaries need to be copied over to the /run/initramfs/<br />
<pre><br />
scp tmp/deploy/images/talos/image-rofs tmp/deploy/images/talos/image-kernel root@<talos-openbmc>:/run/initramfs/<br />
</pre><br />
<br />
Once the images have been transferred, reboot the BMC:<br />
<pre>root@<talos-openbmc> reboot</pre><br />
<br />
OpenBMC may take a while to reboot. Once complete, you will be able to log back in via ssh.<br />
<br />
=== BMC Recovery procedure via U-Boot ===<br />
{{:Talos_II/U-Boot_Recovery}}<br />
<br />
=== Troubleshooting ===<br />
TODO</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1162OpenPOWER Firmware2018-07-30T22:17:27Z<p>Western Semiconductor: clarify that on TalosII boards the FSI debugging interface is used to override the normal POWER9 boot sequence</p>
<hr />
<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
<br />
[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[OTPROM|OTPROM]]<br />
| SBE core (on CPU chip)<br />
| eFuses<br />
|<br />
* very first instructions executed<br />
* loads SBE firmware from SEEPROM into SBE core<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM<br />
# SBE executes SEEPROM firmware<br />
# [[OpenBMC|OpenBMC]] uses [[FSI|FSI]] interface to start SBE<br />
# [[Self-Boot Engine|SBE]] loads Hostboot <br />
# [[Hostboot|Hostboot]] loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1161OpenPOWER Firmware2018-07-30T22:16:19Z<p>Western Semiconductor: Undo revision 1160, I didn't know about FSI</p>
<hr />
<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
<br />
[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[OTPROM|OTPROM]]<br />
| SBE core (on CPU chip)<br />
| eFuses<br />
|<br />
* very first instructions executed<br />
* loads SBE firmware from SEEPROM into SBE core<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM<br />
# SBE executes SEEPROM firmware<br />
# [[OpenBMC|OpenBMC]] starts SBE<br />
# [[Self-Boot Engine|SBE]] loads Hostboot <br />
# [[Hostboot|Hostboot]] loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1160OpenPOWER Firmware2018-07-30T22:10:15Z<p>Western Semiconductor: talos-hostboot appears identical to open-power/hostboot save for a single commit; are you sure the BMC pushes the firmware into the POWER9 core? if so don't hesitate to revert this edit</p>
<hr />
<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
<br />
[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[OTPROM|OTPROM]]<br />
| SBE core (on CPU chip)<br />
| eFuses<br />
|<br />
* very first instructions executed<br />
* loads SBE firmware from SEEPROM into SBE core<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM<br />
# SBE executes SEEPROM firmware, which loads Hostboot firmware into CPU core<br />
# CPU executes [[Hostboot|Hostboot]], which loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1159OpenPOWER Firmware2018-07-30T22:04:47Z<p>Western Semiconductor: /* Process */</p>
<hr />
<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
<br />
[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[OTPROM|OTPROM]]<br />
| SBE core (on CPU chip)<br />
| eFuses<br />
|<br />
* very first instructions executed<br />
* loads SBE firmware from SEEPROM into SBE core<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# SBE executes [[OTPROM|OTPROM]], which loads SEEPROM firmware into SBE PIBMEM<br />
# SBE executes SEEPROM firmware<br />
# [[OpenBMC|OpenBMC]] starts SBE<br />
# [[Self-Boot Engine|SBE]] loads Hostboot <br />
# [[Hostboot|Hostboot]] loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1158OpenPOWER Firmware2018-07-30T21:57:43Z<p>Western Semiconductor: add entry for OTPROM firmware</p>
<hr />
<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
<br />
[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[OTPROM|OTPROM]]<br />
| SBE core (on CPU chip)<br />
| eFuses<br />
|<br />
* very first instructions executed<br />
* loads SBE firmware from SEEPROM into SBE core<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# SBE executes [[OTPROM|OTPROM]]<br />
# [[OpenBMC|OpenBMC]] starts SBE<br />
# [[Self-Boot Engine|SBE]] loads Hostboot <br />
# [[Hostboot|Hostboot]] loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OTPROM&diff=1157OTPROM2018-07-30T21:54:12Z<p>Western Semiconductor: describe otprom loader</p>
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<div>The One Time Programmable (OTP) ROM is a collection of electrical fuses (eFuses) on the primary (14nm SOIFinFet) POWER9 die. It contains the very first instructions executed at power on, and is the ultimate root software executed by the first processor (the SBE) to come online during bootup.<br />
<br />
The source code for the program fused in during manufacturing by IBM can be found in [https://github.com/open-power/sbe/blob/master/src/boot/otprom_init.S otprom_init.S].<br />
<br />
The corresponding electrical fuses blown in order to encode this program are in [https://github.com/open-power/sbe/blob/master/src/boot/OtpromFuseAlter.log OtpromFuseAlter.log], which is a manufacturing instruction file indicating which fuses should be blown using a laser during the assembly-test-packaging part of the manufacturing process. Each line specifies one fuse to be written. The pathname after the "ALTER" keyword on each line typically represents the hierarchical path from the root of the chip netlist (SPICE?) to the fuse cell to be blown. Reviewing the git history for these two files shows how this program has evolved over the various revisions of the silicon die.</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=OpenPOWER_Firmware&diff=1156OpenPOWER Firmware2018-07-30T21:39:34Z<p>Western Semiconductor: Add column indicating where each piece of firmware is loaded from (i.e. where it is stored when the system is powered down)</p>
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<div>'''OpenPOWER Firmware''' is an open-source alternative to OpenFirmware and proprietary IBM firmware used on Power machines.<ref>Kerr, Jeremy. [https://lca2015.linux.org.au/schedule/30305/view_talk OpenPOWER: building an open-source software stack from bare metal]. LCA 2015 - [https://www.youtube.com/watch?v=DigNr08GVss video on YouTube]</ref> It is a general name for many separate pieces of software used to start recent Power Architecture chips made by IBM.<ref>Smith, Stewart. [http://lca2016.linux.org.au/schedule/30215/view_talk Adventures in OpenPOWER Firmware]. LCA 2016 - [https://www.youtube.com/watch?v=a4XGvssR-ag video on YouTube]</ref><br />
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[[OpenBMC|OpenBMC]] is a separate project that creates firmware for the [[BMC|Baseboard Management Controller]].<br />
<br />
== Components ==<br />
<br />
{| class="wikitable sortable"<br />
! Firmware<br />
! Executed on<br />
! Loaded from<br />
! Function<br />
|-<br />
| [[Self-Boot Engine|Self-Boot Engine]] (SBE)<br />
| SBE core (on CPU chip)<br />
| SEEPROM<br />
|<br />
* initialises CPU core<br />
* loads Hostboot<br />
|-<br />
| [[Hostboot|Hostboot]]<br />
| CPU core<br />
| SPI Flash<br />
|<br />
* loads Skiboot<br />
* inits DRAM (zeroing for ECC mem.), Processor Bus, Memory buffer<br />
|-<br />
| [[Skiboot|Skiboot]]<br />
| CPU core<br />
|<br />
|<br />
* implements [[OpenPOWER Abstraction Layer|OpenPOWER Abstraction Layer]] (OPAL) for OS runtime services<br />
* setup PCIe, device tree, real time clock, NVlink, sensors<br />
* loads Petitboot, OCC<br />
|-<br />
| [[Petitboot|Petitboot]]<br />
| CPU core<br />
|<br />
|<br />
* boot menu<br />
* loads operating system<br />
|-<br />
| [[On-Chip Controller|On-Chip Controller]] (OCC)<br />
| OCC core (on CPU chip)<br />
|<br />
|<br />
* thermal regulation on CPU chip<br />
|}<br />
<br />
== Process ==<br />
<br />
# [[OpenBMC|OpenBMC]] starts SBE<br />
# [[Self-Boot Engine|SBE]] loads Hostboot <br />
# [[Hostboot|Hostboot]] loads Skiboot<br />
# [[Skiboot|Skiboot]] loads OCC, Petitboot<br />
# [[Petitboot|Petitboot]] loads the operating system<br />
# operating system talks to firmware through [[OpenPOWER Abstraction Layer|OPAL]]<br />
<br />
== References ==<br />
<br />
<references/><br />
<br />
== See also ==<br />
<br />
* [[OpenBMC|OpenBMC]]<br />
* [[OpenPOWER|OpenPOWER]]<br />
<br />
== External Links ==<br />
<br />
* [https://github.com/open-power/docs OpenPOWER github account]<br />
* [https://github.com/open-power/docs OpenPOWER firmware documentation]<br />
* [https://blog.jms.id.au/2015/07/openpower-firmware-stack/ OpenPower Firmware Stack] - Joel's Weblog<br />
<br />
[[Category:Firmware]]</div>Western Semiconductorhttps://wiki.raptorcs.com/w/index.php?title=SEEPROM&diff=1155SEEPROM2018-07-30T21:26:07Z<p>Western Semiconductor: note size of SEEPROM</p>
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<div>{{Glossary<br />
|name=Serial EEPROM<br />
|abbr=SEEPROM<br />
|desc=Small nonvolatile [[Wikipedia:EEPROM|EEPROM]] located on a [[POWER9]] CPU module. Used to store two redundant copies of the [[SBE]] firmware and the secure boot root of trust hash.<br />
}}<br />
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The Power9 SEEPROM [https://github.com/open-power/hostboot/blob/master/src/include/usr/sbe/sbe_common.H#L71 size is 64KBytes].</div>Western Semiconductor