Murano
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Revision as of 10:02, 20 December 2017 by
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(Created page with "{{Infobox |title = Package Information |header1 = Murano |label2 = Processor |data2 =
POWER8
|label3 = Structure |data3 =
DCM
|label4 = Maximum base clock |...")
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Package Information
Murano
Processor
POWER8
Structure
DCM
Maximum base clock
-
Maximum turbo clock
-
Maximum
TDP
-
PCIe controllers (
PEC
)
-
PCIe generation
3
Maximum PCIe lanes
-
Maximum PCIe endpoints
-
CAPI
interfaces
-
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